參數(shù)資料
型號(hào)： 7007L35PF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： SRAM
英文描述： 32K X 8 DUAL-PORT SRAM, 35 ns, PQFP80
封裝： 14 X 14 MM, 1.40 MM HEIGHT, GREEN, TQFP-80
文件頁(yè)數(shù)： 13/21頁(yè)
文件大?。?/td> 168K
代理商： 7007L35PF
IDT7007S/L
High-Speed 32K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
20
Once the left side was finished with its task, it would write a one to
Semaphore 0 and may then try to gain access to Semaphore 1. If
Semaphore 1 was still occupied by the right side, the left side could undo
itssemaphorerequestandperformothertasksuntilitwasabletowrite,then
readazerointoSemaphore1.Iftherightprocessorperformsasimilartask
with Semaphore 0, this protocol would allow the two processors to swap
16K blocks of Dual-Port RAM with each other.
The blocks do not have to be any particular size and can even be
variable, depending upon the complexity of the software using the
semaphore flags. All eight semaphores could be used to divide the Dual-
Port RAM or other shared resources into eight parts. Semaphores can
even be assigned different meanings on different sides rather than being
given a common meaning as was shown in the example above.
Semaphores are a useful form of arbitration in systems like disk
interfaceswheretheCPUmustbelockedoutofasectionofmemoryduring
a transfer and the I/O device cannot tolerate any wait states. With the use
ofsemaphores,oncethetwodeviceshasdeterminedwhichmemoryarea
was“off-limits”totheCPU,boththeCPUandtheI/Odevicescouldaccess
their assigned portions of memory continuously without any wait states.
Semaphoresarealsousefulinapplicationswherenomemory“WAIT”
stateisavailableononeorbothsides.Onceasemaphorehandshakehas
been performed, both processors can access their assigned RAM
segments at full speed.
Another application is in the area of complex data structures. In this
case,blockarbitrationisveryimportant.Forthisapplicationoneprocessor
may be responsible for building and updating a data structure. The other
processor then reads and interprets that data structure. If the interpreting
processorreadsanincompletedatastructure,amajorerrorconditionmay
exist. Therefore, some sort of arbitration must be used between the two
differentprocessors.Thebuildingprocessorarbitratesfortheblock,locks
it and then is able to go in and update the data structure. When the update
is completed, the data structure block is released. This allows the
interpretingprocessortocomebackandreadthecompletedatastructure,
thereby guaranteeing a consistent data structure.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
7007L35PF8 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Dual 5V 256K-Bit 32K x 8 35ns 80-Pin TQFP T/R 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC DUAL 5V 256KBIT 32KX8 35NS 80TQFP - Tape and Reel
7007L55J 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
7007L55J8 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
7007L55PF 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
7007L55PF8 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Dual 5V 256K-Bit 32K x 8 55ns 80-Pin TQFP T/R 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC DUAL 5V 256KBIT 32KX8 55NS 80TQFP - Tape and Reel
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