20
μPD780948, μPD78F0948, μPD780949, μPD78F0949
Figure No.
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CRC Field....................................................................................................................... 267
ACK Field ....................................................................................................................... 267
End of Frame.................................................................................................................. 267
Interframe Space/Error Active ........................................................................................ 268
Interframe Space/Error Passive...................................................................................... 268
Error Frame .................................................................................................................... 269
Overload Frame ............................................................................................................. 270
Nominal Bit Time (8 to 25 Time Quantum)...................................................................... 275
Adjusting Synchronization of the Data Bit....................................................................... 276
Bit Synchronization......................................................................................................... 277
Transmission State Shift Chart ....................................................................................... 278
Reception State Shift Chart............................................................................................ 279
Error State Shift Chart .................................................................................................... 280
Structural Block Diagram................................................................................................ 281
Connection to the CAN Bus............................................................................................ 281
Transmit Message Definition Bits.................................................................................... 287
Transmit Identifier ........................................................................................................... 288
Transmit Data ................................................................................................................. 289
Control Bits for Receive Identifier ................................................................................... 292
Receive Status Bits ........................................................................................................ 293
Receive Identifier............................................................................................................ 295
Receive Data.................................................................................................................. 296
Identifier Compare with Mask ......................................................................................... 298
Control Bits for Mask Identifier........................................................................................ 299
Mask Identifier................................................................................................................ 300
CAN Control Register..................................................................................................... 301
DCAN Support ............................................................................................................... 302
Time Stamp Function ..................................................................................................... 303
SOFOUT Toggle Function .............................................................................................. 303
Global Time System Function......................................................................................... 303
CAN Error Status Register ............................................................................................. 304
Transmit Error Counter ................................................................................................... 307
Receive Error Counter.................................................................................................... 308
Message Count Register................................................................................................ 309
Bit Rate Prescaler .......................................................................................................... 310
Synchronization Control Register 0 and 1 (2/2) .............................................................. 311
Synchronization Control Register 1 ................................................................................ 313
Transmit Control Register ............................................................................................... 315
Receive Message Register............................................................................................. 317
Mask Control Register.................................................................................................... 318
Redefinition Control Register.......................................................................................... 320
Initialization Flow Chart .................................................................................................. 324
Transmit Preparation ......................................................................................................
Transmit Abort, Software Flow........................................................................................ 326
Handling of Semaphore Bits by DCAN-Module .............................................................. 327
Receive with Interrupt, Software Flow ............................................................................ 328
Receive, Software Polling ............................................................................................... 329
325