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| 型號(hào)： | Z80B-DART |
| 英文描述： | Z8 Microcontrollers |
| 中文描述： | Z8微控制器 |
| 文件頁(yè)數(shù)： | 82/222頁(yè) |
| 文件大?。?/td> | 1595K |
| 代理商： | Z80B-DART |
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Z8 Microcontrollers
Counter/Timers
ZiLOG
6-4
UM001600-Z8X0599
6.3.2 Prescaler Operations
During counting, the programmed clock source drives the
6-bit Prescaler Counter. The counter is counted down from
the value specified by bits of the corresponding Prescaler
Register, PRE0 (bit 7 to bit 2) or PRE1 (bit 7 to bit 2). (Fig-
ures 6-3, 6-4). When the Prescaler Counter reaches its
end-of-count, the initial value is reloaded and counting
continues. The prescaler never actually reaches 0. For ex-
ample, if the prescaler is set to divide-by-three, the count
sequence is:
Each time the prescaler reaches its end of count a carry is
generated, that allows the Counter/Timer to decrement by
one on the next timer clock input. When the Counter/Timer
and the prescaler both reach the end-of-count, an interrupt
request is generated (IRQ4 for T0, IRQ5 for T1). Depend-
ing on the counting mode selected, the Counter/Timer will
either come to rest with its value at 00H (Single-Pass
Mode) or the initial value will be automatically reloaded
and counting will continue (Continuous Mode). The count-
ing modes are controlled by bit 0 of PRE0 and bit 0 of
PRE1. (Figure 6-8). A 0, written to this bit configures the
counter for Single-pass counting mode, while a 1 written to
this bit configures the counter for Continuous mode.
The Counter/Timer can be stopped at any time by setting
the Enable Count bit to 0, and restarted by setting it back
to 1. The Counter/Timer will continue its count value at the
time it was stopped. The current value in the Counter/Tim-
er can be read at any time without affecting the counting
operation.
Note:
The prescaler registers are write-only and cannot
be read.
New initial values can be written to the prescaler or the
Counter/Timer registers at any time. These values will be
transferred to their respective down counters on the next
load operation. If the Counter/Timer mode is continuous,
the next load occurs on the timer clock following an end-of-
count. New initial values should be written before the de-
sired load operation, since the prescalers always effective-
ly operate in Continuous count mode.
The time interval (i) until end-of-count, is given by the
equation:
The internal clock frequency defaults to the external clock
source (XTAL, ceramic resonator, and others) divided by
2. Some Z8 microcontrollers allow this divisor to be
changed via the Stop-Mode Recovery register. See the
product data sheet for available clock divisor options.
Note that t is equal to eight divided-by-XTAL frequency of
the external clock source for T1 (external clock mode
only).
p = the prescaler value (1 – 63) for T
0
and T
1
.
The minimum prescaler count of 1 is achieved by loading
000001xx. The maximum prescaler count of 63 is
achieved by loading 111111xx.
v = the Counter/Timer value (1-256)
Minimum duration is achieved by loading 01H (1 prescaler
output count), maximum duration is achieved by loading
00H (256 prescaler outputs counts).
The prescaler and counter/timer are true divide-by-n
counters.
3–2–1–3–2–1–3–2–1–3...
i = t X p X v
in which:
t = four times the internal clock period.
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