Z8 Microcontrollers
ZiLOG
Instruction Descriptions and Formats
UM001600-Z8X0599
12-43
LDCI
LOAD CONSTANT AUTO-INCREMENT
LDCI
Load Constant Auto-increment
LDCI dst, src
Instruction Format:
Operation:
dst <— src
r <— r + 1
rr <— rr + 1
This instruction is used for block transfers of data between program memory and the Register File. The
address of the program memory location is specified by a Working Register Pair, and the address of the
Register File location is specified by Working Register. The contents of the source location are loaded
into the destination location. Both addresses in the Working Registers are then incremented
automatically. The contents of the source operand are not affected.
Example:
If Working Register Pair R6-R7 contains 30A2H, program memory location 30A2H and 30A3H contain
22H and BCH respectively, and Working Register R2 contains 20H, the statement:
LDCI @R2, @RR6
Op Code: C3 26
loads the value 22H into Register 20H. Working Register Pair RR6 is incremented to 30A3H and Working
Register R2 is incremented to 21H. A second
LDCI @R2, @RR6
Op Code: C3 26
loads the value BCH into Register 21H. Working Register Pair RR6 is incremented to 30A4H and
Working Register R2 is incremented to 22H.
18
Cycles
OPC
(Hex)
Address Mode
src dst
C3
Ir
Irr
18
D3
Irr
Ir
dst
src
OPC
OPC
dst
src
Flags:
C:
Z:
S:
V:
D:
H:
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected