Z8 Microcontrollers
ZiLOG
Instruction Descriptions and Formats
UM001600-Z8X0599
12-51
POP
POP
POP
Pop
POP dst
Instruction Format:
Operation:
dst <— @SP
SP <— SP + 1
The contents of the location specified by the SP (Stack Pointer) are loaded into the destination operand.
The SP is then incremented automatically.
Note:
Address modes R or IR can be used to specify a 4-bit Working Register. In this format, the destination
Working Register operand is specified by adding 1110B (EH) to the high nibble of the operand. For
example, if Working Register R12 (CH) is the destination operand, then ECH will be used as the
destination operand in the Op Code.
Example:
If the SP (Control Registers FEH and FFH) contains the value 70H and Register 70H contains 44H, the
statement:
POP 34H
Op Code: 50 34
loads the value 44H into Register 34H. After the POP operation, the SP contains 71H. The contents of
Register 70 are not affected.
Example:
If the SP (Control Registers FEH and FFH) contains the value 1000H, external data memory location
1000H contains 55H, and Working Register R6 contains 22H, the statement:
POP @R6
Op Code: 51 E6
loads the value 55H into Register 22H. After the POP operation, the SP contains 1001H. The contents
of Working Register R6 are not affected.
OPC
dst
10
10
Cycles
OPC
(Hex)
Address Mode
dst
50
51
R
IR
Flags:
C:
Z:
S:
V:
D:
H:
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
E
dst