REV. 1.0.1 AD15 STS1TXA_2_D1 TXHDLCDAT_2_1 TXGFC_2 I TTL Transmit STS-1 Telecom Bus" />
參數(shù)資料
型號(hào)： XRT94L31IB
廠商： Exar Corporation
文件頁數(shù)： 91/133頁
文件大?。?/td> 0K
描述： IC MAPPER DS3/E3/STS-1 504TBGA
標(biāo)準(zhǔn)包裝： 24
應(yīng)用： 網(wǎng)絡(luò)切換
接口： 總線
電源電壓： 3.14 V ~ 3.47 V
封裝/外殼： 504-LBGA
供應(yīng)商設(shè)備封裝： 504-TBGA（35x35）
包裝： 托盤
安裝類型： 表面貼裝
XRT94L31
60
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
REV. 1.0.1
AD15
STS1TXA_2_D1
TXHDLCDAT_2_1
TXGFC_2
I
TTL
Transmit STS-1 Telecom Bus Interface - Channel 2 - Data Bus Input pin
number 1/Transmit High-Speed HDLC Controller Input Interface block -
Input Data Bus - Pin 1:
The function of this pin depends upon whether or not the STS-1 Telecom
Bus Interface, associated with Channel 2 is enabled.
If STS-1 Telecom Bus (Channel 2) has been enabled - Transmit STS-
1 Telecom Bus Interface - Input Data Bus pin number 1 -
STS1TxA_2_D1:
This input pin along with STS1TXA_2_D[7:2] and STS1TXA_2_D0 func-
tions as the Transmit (Add) STS-1 Telecom Bus Interface - Input Data
Bus for Channel 2. The Transmit STS-1 Telecom Bus interface will sam-
ple and latch this pin upon the falling edge of STS1TXA_CLK_2.
If the STS-1 Telecom Bus Interface (associated with Channel 2) has
been disabled:
This input pin can function in either of the following roles, depending
upon which mode the XRT94L31 has been configured to operate in.
If the XRT94L31 has been configured to operate in the High-Speed
HDLC Controller over DS3/STS-3 Mode - Transmit High-Speed
HDLC Controller Input Interface block - Channel 2 - Data Bus Input
pin # 2 - TXHDLCDAT_2_1:
In this mode this input pin will function as Bit 1 within the Transmit High-
Speed HDLC Controller Input Interface block - Input Data Bus (e.g., the
TxHDLCDat_2[7:0] input pins).The Transmit High-Speed HDLC Control-
ler Input Interface block will provide the System-Side Terminal equip-
ment with a byte-wide Transmit High-Speed HDLC Controlller clock
output signal (TxHDLCClk_2). The Transmit High-Speed HDLC Control-
ler Input Interface block will sample the data residing on this input pin
(along with the rest of the TxHDLCDat_2[7:0] input pins) upon the rising
edge of the TxHDLCClk_2 clock output signal.
If the XRT94L31 has been configured to operate in the ATM UNI
Mode
- TXGFC_2 (Transmit GFC data - Channel 2)
If the XRT94L31 has been configured to operate in the 3-Channel
DS3/E3/STS-1 to STS-3/STM-1 Mapper Mode
- NO FUNCTION:
Tie this input pin to GND.
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION
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參數(shù)描述
XRT94L31IB-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Demapper RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT94L31IB-L 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Mapper / Demapper RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT94L33 制造商:EXAR 制造商全稱:EXAR 功能描述:-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - SONET REGISTERS
XRT94L33_06 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
XRT94L33_07 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - ATM REGISTERS
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