REV. 1.0.1 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC Figure 18 presents an illustration of the waveforms of the signals that" />
參數(shù)資料
型號: XRT94L31IB
廠商: Exar Corporation
文件頁數(shù): 19/133頁
文件大小: 0K
描述: IC MAPPER DS3/E3/STS-1 504TBGA
標(biāo)準(zhǔn)包裝: 24
應(yīng)用: 網(wǎng)絡(luò)切換
接口: 總線
電源電壓: 3.14 V ~ 3.47 V
封裝/外殼: 504-LBGA
供應(yīng)商設(shè)備封裝: 504-TBGA(35x35)
包裝: 托盤
安裝類型: 表面貼裝
XRT94L31
115
REV. 1.0.1
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
Figure 18 presents an illustration of the waveforms of the signals that will be output via the Receive STS-1/
STM-0 Telecom Bus Interface along with the timing parameter (t12).
NOTE: The value for t12 can be found in
1.4.3
The Receive STS-1/STM-0 Telecom Bus Interface Timing (for Channel 0 when configured to
operate in the STS-3/STM-1 Mode)
In the Receive STS-1/STM-0 Telecom Bus Interface, all of the signals (which are output via this Bus Interface)
are updated upon the rising edge of RxD_CLK (19.44MHz clock signal).
Figure 19 presents an illustration of the waveforms of the signals that will be output via the Receive STS-1/
STM-0 Telecom Bus Interface, associated with Channel 0, whenever it is configured to operate in the STS-3/
STM-1 Mode.
FIGURE 18. AN ILLUSTRATION OF THE WAVEFORMS OF THE SIGNALS THAT ARE OUTPUT VIA THE RECEIVE STS-1/
STM-0 TELECOM BUS INTERFACE
TABLE 19: TIMING INFORMATION FOR THE RECEIVE STS-1/STM-0 TELECOM BUS INTERFACE
SYMBOL
DESCRIPTION
MIN.
TYP.
MAX.
t12
Rising edge of RxD_CLK to updates in RxD_D[7:0], RxD_PL, RxD_C1J1,
RxD_ALARM and RxD_DP
0ns
9.4ns
t12
RxD_CLK
RxD_D[7:0]
RxD_PL
RxD_C1J1
A2
C1
J1
Data
J1
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