Rev.1.01 XRD98L63 Readback Register D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Readback RBenable RBreg[8] RBreg[7] RBreg[6] RBreg[5] RBreg[4] RBreg[3] RB" />
參數(shù)資料
型號： XRD98L63ZEVAL
廠商： Exar Corporation
文件頁數(shù)： 5/41頁
文件大?。?/td> 0K
描述： EVAL BOARD FOR XRD98L63
標(biāo)準(zhǔn)包裝： 1
系列： *
13
Rev.1.01
XRD98L63
Readback Register
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Readback
RBenable RBreg[8]
RBreg[7]
RBreg[6]
RBreg[5]
RBreg[4]
RBreg[3]
RBreg[2]
RBreg[1]
RBreg[0]
default
0
RBenable, used to enable the Readback feature. 0=Readback OFF. 1=ReadBacK ON.
RBreg[8:6], used to select internal Calibration or Multiple Gain registers for Readback.
RBreg[5:0], used to select internal Serial Interface registers for Readback.
See the “Serial Interface Readback” section (pg. 14) for more information.
Reset Register
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Reset
default
0
The Reset bit is used to reset the chip to power-up default conditions.
Program Reset=1 to reset the chip. After all internal registers are reset, the Reset bit will clear itself.
See the “Chip Reset” section (pg. 34) for more information.
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