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VT8231
Preliminary Revision 0.8
October 29, 1999
-
112-
Function 5 & 6 Registers - AC97 Audio & Modem Codecs
7HFKQRORJLHV,QF
:H &RQQHFW
Function 5 I/O Base 0 Regs
–
DXSn Scatter/Gather DMA
“
n
”
is 0-3 for DXS channels 0-3
I/O Offset n0
–
DXSn SGD Read Channel Status ....... RWC
7
SGD Active (0 = completed or terminated)........RO
6-3
Reserved
........................................ always reads 0
2
SGD Stopped........................................................RO
1
SGD EOL
......................................................RWC
0
SGD Flag
......................................................RWC
I/O Offset n1
–
DXSn SGD Read Channel Control ....... RW
7
SGD Trigger...........................WO (always reads 0)
0
No effect
1
Trigger SGD Operation
6
SGD Terminate ......................WO (always reads 0)
0
No effect
1
Terminate SGD Operation
5
Auto Restart
0
Stop SGD Operation at EOL
1
Restart SGD Operation at EOL
4
SGD Pause
0
Release SGD pause and resume the transfer
from the paused line
1
Pause SGD read operation (SGD pointer stays
at the current address)
3-2
Reserved
........................................ always reads 0
1
Interrupt on EOL @ End of Block
0
Disable ...................................................default
1
Enable
0
Interrupt on FLAG @ End-of-Blk
0
Disable ...................................................default
1
Enable
I/O Offset n2
–
DXSn Read Channel Left Volume ......... RW
7-6
Reserved
........................................ always reads 0
5-0
Left Volume Control
000000
0 db...................................................default
000111
-10.5 db
011111
-46.5 db.............................................default
111111
muted (instead of
–
94.5 db)
I/O Offset n3
–
DXSn Read Channel Right Volume ...... RW
7-6
Reserved
........................................ always reads 0
5-0
Right Volume Control
000000
0 db...................................................default
000111
-10.5 db
011111
-46.5 db.............................................default
111111
muted (instead of
–
94.5 db)
I/O Offset n7-n4
–
DXSn SGD Table Pointer Base ....... RW
31-0 SGD Table Pointer Base Address (even addr)....W
Current Pointer Address .......................................R
I/O Offset nB-n8
–
DXSn Read Channel Format ........... RO
31-24 Stop Index
(SGD operation will stop at end of entry)
23-22 Reserved
........................................always reads 0
21-20 PCM Format
00 8-Bit Mono Format................................default
01 8-Bit Stereo Format
10 16-bit Mono Format...............................default
11 16-bit Stereo Format
19-0 DXSx Channel Sample Rate
I/O Offset nF-nC
–
DXSn SGD Count Pointer................ RO
31-24 Current SGD Index
23-0 Current SGD Count
SGD Table Format
61
60-56
-reserved-
(FM
Chan
Only)
63
EOL FLAG STOP
62
55-32
Base
Count
[23:0]
31-0
Base
Address
[31:0]
EOL
End Of Link. 1 indicates this block is the last of the
link. If the channel
“
Interrupt on EOL
”
bit is set, then
an interrupt is generated at the end of the transfer.
FLAG
Block Flag. If set, transfer pauses at the end of this
block. If the channel
“
Interrupt on FLAG
”
bit is set,
then an interrupt is generated at the end of this block.
STOP
Block Stop. If set, transfer pauses at the end of this
block. To resume the transfer, write 1 to Rx0[2].