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參數(shù)資料
| 型號(hào)： | USB97C201-MN |
| 廠商： | STANDARD MICROSYSTEMS CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | USB 2.0 ATA/ ATAPI Controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 38/59頁 |
| 文件大?。?/td> | 385K |
| 代理商： | USB97C201-MN |
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SMSC DS – USB97C201
Page 38
Rev. 03/25/2002
PRELIMINARY
USB_ERR
(0xDA - RESET=0x00)
NAME
USB ERROR REGISTER
DESCRIPTION
BIT
R/W
has been received on an endpoint.
Note:
Writing a “1” to a bit in this register will clear the bit.. If any bit is set in this register the USB_ERR bit is set in
the USB_STAT register.
Table 51 – MSB ATA Data Register
MSB_ATA
(0xDB - RESET=0x00)
NAME
D[15:8]
MSB ATA CONTROL/STATUS DATA REGISTER
DESCRIPTION
During 8051 writes to XDATA 0x31F0 (the ATA Drives
Control/Status register), data in this register represents the
MS byte of the 16 bit operation to this address. For a read
of 0x31F0, the MS byte data is returned in this register after
the PIO_COMPLETE bit is set in the ATA_CTL register. (the
data returned from the actual read of 31F0 should be
discarded)
BIT
[7:0]
R/W
R/W
Table 52 – LSB ATA Data Register
LSB_ATA
(0xDC - RESET=0x00)
NAME
D[7:0]
LSB ATA CONTROL/STATUS DATA REGISTER
DESCRIPTION
During 8051 reads to XDATA 0x31F1-7 and 33F6 (the ATA
Drive’s 8 bit registers), the actual data is returned in this
register after the PIO_COMPLETE bit is set in the ATA_CTL
register. During writes, this register is unused.
For 8051 read to XDATA 0x31F0, the LS byte of data is
returned in this register after the PIO_COMPLETE bit is set
in the ATA_CTL register. During writes, this register is
unused.
BIT
[7:0]
R/W
R/W
Table 53 – ATA Transfer Count Register 0
ATA_CNT0
(0xE1 - RESET=0x00)
NAME
D[7:0]
ATA TRANSFER COUNT REGISTER 0
DESCRIPTION
See note below.
BIT
[7:0]
R/W
R/W
Table 54 – ATA Transfer Count Register 1
ATA_CNT1
(0xE2 - RESET=0x00)
NAME
D[15:8]
ATA TRANSFER COUNT REGISTER 1
DESCRIPTION
See note below.
BIT
[7:0]
R/W
R/W
Table 55 – ATA Transfer Count Register 2
ATA_CNT2
(0xE3 - RESET=0x00)
NAME
D[23:16]
ATA TRANSFER COUNT REGISTER 2
DESCRIPTION
See note below.
BIT
[7:0]
R/W
R/W
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PDF描述 |
|---|---|
| USB97CFDC-MN | USB FLOPPY DISK CONTROLLER |
| USB97C202 | ATA/ATAPI CONTROLLER |
| USB97C202-MN-02 | ATA/ATAPI CONTROLLER |
| USB97C223 | capacitor Selection for Internal Regulator Output Pins |
| USB97C243 | capacitor Selection for Internal Regulator Output Pins |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| USB97C202 | 制造商:SMSC 制造商全稱:SMSC 功能描述:USB 2.0 ATA/ATAPI Controller |
| USB97C202_07 | 制造商:SMSC 制造商全稱:SMSC 功能描述:USB 2.0 ATA/ATAPI Controller |
| USB97C202-MN-02 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| USB97C202-MN-04 | 制造商:Rochester Electronics LLC 功能描述:USB 2.0 ATA/ATAPI PERI CNTRLR - Bulk |
| USB97C202-MN-05 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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