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SMSC DS – USB97C201
Page 17
Rev. 03/25/2002
PRELIMINARY
SIE & BUFFER CONTROL REGISTERS
R/W
USB Address Register
R/W
SIE Configuration Register
R/W
USB Bus Status Register
R/W
USB Bus Status Mask Register
R
SIE Status Register
R/W
USB Configuration Number Register
R/W
SIE Status Mask Register
EP0RX_CTL
R/W
Endpoint 0 Receive Control Register
EP0TX_CTL
R/W
Endpoint 0 Transmit Control Register
EP1RX_CTL
R/W
Endpoint 1 Receive Control Register
EP1TX_CTL
R/W
Endpoint 1 Transmit Control Register
EP2_CTL
R/W
Endpoint 2 Control Register
EP0RX_BC
R/W
Endpoint 0 Receive Byte Count Register
EP0TX_BC
R/W
Endpoint 0 Transmit Byte Count Register
EP1RX_BC
R/W
Endpoint 1 Receive Byte Count Register
EP1TX_BC
R/W
Endpoint 1 Transmit Byte Count Register
RAMWRBC_A1
R/W
RAM Buffer Write Byte Count Register A1
RAMWRBC_A2
R/W
RAM Buffer Write Byte Count Register A2
RAMWRBC_B1
R/W
RAM Buffer Write Byte Count Register B1
RAMWRBC_B2
R/W
RAM Buffer Write Byte Count Register B2
RAMRDBC_A1
R/W
RAM Buffer Read Byte Count Register A1
RAMRDBC_A2
R/W
RAM Buffer Read Byte Count Register A2
RAMRDBC_B1
R/W
RAM Buffer Read Byte Count Register B1
RAMRDBC_B2
R/W
RAM Buffer Read Byte Count Register B2
NAK
R/W
NAK Status Register
NAK_MSK
R/W
NAK Mask Register
USB_ERR
R
USB Error Register
ATA CONFIGURATION REGISTERS
MSB_ATA
R/W
MSB ATA Data Register
LSB_ATA
R/W
LSB ATA Data Register
ATA_CTL
R/W
ATA Control Register
ATA_DMA
R/W
ATA Ultra DMA Timing Register
IDE_TIM
R/W
IDE Timing Register
ATA_CNT0
R/W
ATA Transfer Count Register 0
ATA_CNT1
R/W
ATA Transfer Count Register 1
ATA_CNT2
R/W
ATA Transfer Count Register 2
ATA_CNT3
R/W
ATA Transfer Count Register 3
ATA_SRCA
R/W
ATA Slew Rate Control A Register
ATA_SRCB
R/W
ATA Slew Rate Control B Register
A9
AA
AB
AC
B0
AD
AE
AF
B1
B2
B3
B4
B5
B6
B7
C7
CE
CF
D1
D2
D3
D4
D5
D6
D7
D9
DA
USB_ADD
SIE_CONF
USB_STAT
USB_MSK
SIE_STAT
USB_CONF
SIE_MSK
29
29
30
30
31
32
31
32
32
32
33
33
34
35
35
35
35
35
35
36
36
36
36
36
36
37
39
DB
DC
DD
DE
DF
E1
E2
E3
E4
E5
E6
38
38
39
40
40
38
38
38
39
42
42