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參數(shù)資料
| 型號： | USB3450-FZG |
| 廠商： | STANDARD MICROSYSTEMS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | HI-SPEED USB HOST OR DEVICE PHY WITH UTMI+INTERFACE |
| 中文描述： | SERIAL COMM CONTROLLER, QCC40 |
| 封裝： | 6 X 6 MM, 0.90 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, MO-220, QFN-40 |
| 文件頁數(shù)： | 28/40頁 |
| 文件大?。?/td> | 1086K |
| 代理商： | USB3450-FZG |
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Hi-Speed USB Host or Device PHY With UTMI+ Interface
Datasheet
Revision 0.1 (05-11-05)
28
SMSC USB3450
DATASHEET
The OPMODE[1:0] signals are normally changed only when the transmitter and the receiver are
quiescent, i.e. when entering a test mode or for a device initiated resume.
When using OPMODE[1:0] = 10 the SYNC and EOP patterns are not transmitted.
The only exception to this is when OPMODE[1:0] is set to state 2 while TXVALID has been asserted
(the transceiver is transmitting a packet), in order to flag a transmission error. In this case, the
USB3450 has already transmitted the SYNC pattern so upon negation of TXVALID the EOP must also
be transmitted to properly terminate the packet. Changing the OPMODE[1:0] signals under all other
conditions, while the transceiver is transmitting or receiving data will generate undefined results.
7.3
Test Mode Support
7.4
SE0 Handling
For FS operation, IDLE is a J state on the bus. SE0 is used as part of the EOP or to indicate reset.
When asserted in an EOP, SE0 is never asserted for more than 2 bit times. The assertion of SE0 for
more than 2.5us is interpreted as a reset by the device operating in FS mode.
For HS operation, IDLE is a SE0 state on the bus. SE0 is also used to reset a HS device. A HS
device cannot use the 2.5us assertion of SE0 (as defined for FS operation) to indicate reset since the
bus is often in this state between packets. If no bus activity (IDLE) is detected for more than 3ms, a
HS device must determine whether the downstream facing port is signaling a suspend or a reset. The
following section details how this determination is made. If a reset is signaled, the HS device will then
initiate the HS Detection Handshake protocol.
7.5
Reset Detection
If a device in HS mode detects bus inactivity for more than 3ms (T1), it reverts to FS mode. This
enables the FS pull-up on the DP line in an attempt to assert a continuous FS J state on the bus. The
Link must then check LINESTATE for the SE0 condition. If SE0 is asserted at time T2, then the
upstream port is forcing the reset state to the device (i.e., a Driven SE0). The device will then initiate
the HS detection handshake protocol.
10
2
Disable Bit Stuffing
and NRZI encoding
Disables bitstuffing and NRZI encoding logic so that 1's loaded
from the DATA bus become 'J's on the DP/DM and 0's become
'K's
11
3
Reserved
N/A
Table 7.3 Hi-Speed Test Modes
HI-SPEED TEST MODES
USB3450 SETUP
OPERATIONAL MODE
LINK TRANSMITTED
DATA
XCVRSELECT &
TERMSELECT
SE0_NAK
State 0
No transmit
HS
J
State 2
All '1's
HS
K
State 2
All '0's
HS
Test_Packet
State 0
Test Packet data
HS
Table 7.2 Operational Modes (continued)
MODE[1:0]
STATE#
STATE NAME
DESCRIPTION
相關(guān)PDF資料 |
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| USB97C201-MC | USB 2.0 ATA/ ATAPI Controller |
| USB97C201-MN | USB 2.0 ATA/ ATAPI Controller |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| USB-3488A | 功能描述:數(shù)據(jù)記錄與采集 HIGH PERF IEEE-488 USB DAQ GPIB INT CON RoHS:否 制造商:Lantronix 描述/功能:Analog device server 顯示器類型:None 電流額定值: |
| USB3500 | 制造商:SMSC 制造商全稱:SMSC 功能描述:Hi-Speed USB Host, Device or OTG PHY With UTMI+ Interface |
| USB3500-ABZJ | 功能描述:接口 - 專用 USB 2.0 PHY UTMI RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| USB3503 | 制造商:SMSC 制造商全稱:SMSC 功能描述:USB 2.0 HSIC High-Speed Hub Controller Optimized for Portable Applications |
| USB3503A | 制造商:SMSC 制造商全稱:SMSC 功能描述:USB 2.0 HSIC High-Speed Hub Controller Optimized for Portable Applications |
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