參數(shù)資料
型號: UPD6708CX
廠商: NEC Corp.
英文描述: IEBusa Inter Equipment Busa PROTOCOL CONTROL LSI
中文描述: IEBusa設(shè)備布薩間協(xié)議控制大規(guī)模集成電路
文件頁數(shù): 22/72頁
文件大?。?/td> 292K
代理商: UPD6708CX
22
μ
PD6708
4.
INTERFACING WITH HOST CONTROLLER
This chapter will explain the interfacing that occurs between the
μ
PD6708 and the host controller.
4.1
Accessible Buffers and Registers from Host Controller
The host controller, which controls the
μ
PD6708, can access the write data (WDB), the read data buffer (RDB), the
command register (CMR), and the status register (STR) within the
μ
PD6708.
4.1.1
Write data buffer (WDB)
WDB is a 4-byte FIFO buffer in which the host controller transmit data and the parameters of the communication control
commands are written.
4.1.2
Read data buffer (RDB)
RDB is a 20-byte FIFO buffer which stores the receive data acknowledged by the data link layer controller in the
μ
PD6708.
The host controller reads the
μ
PD6708 receive data from RDB.
4.1.3
Command register (CMR)
CMR is an 8-bit register used to write control commands for the
μ
PD6708.
As shown in Table 4-1, the host controller sets the reset mode and the host interface mode in higher 4 bits and sets the
communication control command code in lower 4 bits.
Table 4-1. Contents of Command Register
Bit
Value
Meaning
Bit 7
1
Entering the reset mode
0
Exiting the reset mode
Bit 6
1
Data of lower 4 bits of CMR is valid.
0
Data of lower 4 bits of CMR is not valid.
Bit 5
00
Change of mode through pin control
Switches the host interface mode
Bit 4
01
Data write mode
10
Data read mode
11
Status read mode
Bit 3 to
Bit 0
Set the communication control command codes
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