參數(shù)資料
型號: UDA1350AH
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: IEC 958 audio DAC(IEC 958音頻轉(zhuǎn)換器)
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁數(shù): 23/36頁
文件大?。?/td> 154K
代理商: UDA1350AH
1999 Dec 16
23
Philips Semiconductors
Preliminary specification
IEC 958 audio DAC
UDA1350AH
8.7.8.14
PLL reset
A 1-bit value to reset the PLL. This is the bit which is set in
the initialisation string. When this bit is asserted, the PLL
will be reset and the output clock of the PLL will be forced
to its lowest value, which is in the area of a few MHz.
Table 22
PLL reset
8.7.9
R
EADABLE REGISTERS
8.7.9.1
Mute status
A 1-bit value indicating whether the interpolator is muting
or not muting.
Table 23
Interpolator mute status
8.7.9.2
PLL lock detection
A 1-bit value indicating that the clock regeneration is
locked.
Table 24
PLL lock indication
8.7.9.3
SPDIF lock detection
A 1-bit value indicating the IEC 958 decoder is locked and
is decoding correct data.
Table 25
SPDIF lock detection
8.7.9.4
Audio sample frequency detection
A 2-bit value indicating the audio sample frequency of the
IEC 958 input signal.
Table 26
Audio sample frequency detection
8.7.9.5
PCM detection
A 1-bit value which indicates whether the IEC 958 input
contains PCM audio data or other binary data.
Table 27
Two channel PCM input detection
8.7.9.6
Pre-emphasis detection
A 1-bit value which indicates whether the pre-emphasis bit
was set on the IEC 958 input signal or not set.
Table 28
Pre-emphasis detection
8.7.9.7
Clock accuracy detection
A 2-bit value indicating the timing accuracy of the IEC 958
input signal is conforming to the IEC 958 specification.
Table 29
Input signal accuracy detection
RST PLL
FUNCTION
0
1
normal operation
PLL is reset
MT stat
FUNCTION
0
1
no muting
muting
PLL lock
FUNCTION
0
1
out-of-lock
locked
SPD lock
FUNCTION
0
1
not locked
or
non-PCM data detected
locked
and
PCM data detected
ASF1
ASF0
FUNCTION
0
0
1
1
0
1
0
1
44.1 kHz
undefined
48.0 kHz
32.0 kHz
PCM stat
FUNCTION
0
1
input with two channel PCM data
input without two channel PCM data
PRE
FUNCTION
0
1
no pre-emphasis
pre-emphasis
ACC1
ACC0
FUNCTION
0
0
1
1
0
1
0
1
level II
level I
level III
undefined
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