參數(shù)資料
型號(hào): UDA1350AH
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: IEC 958 audio DAC(IEC 958音頻轉(zhuǎn)換器)
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁(yè)數(shù): 22/36頁(yè)
文件大小: 154K
代理商: UDA1350AH
1999 Dec 16
22
Philips Semiconductors
Preliminary specification
IEC 958 audio DAC
UDA1350AH
8.7.8.9
Bass boost
A 4-bit value to program the bass boost setting in
combination with the filter mode settings. At f
s
= 44.1 kHz
the
3 dB point for minimum setting is 250 Hz and the
3 dB point for maximum setting is 300 Hz. The default
value is ‘0000’.
Table 17
Bass boost settings
8.7.8.10
De-emphasis
A 2-bit value to enable the digital de-emphasis filter.
Table 18
De-emphasis selection
8.7.8.11
Soft mute
A 1-bit value to enable the digital mute.
Table 19
Soft mute selection
8.7.8.12
Volume control
A 6-bit value to program the left and right channel volume
attenuation. The range is from 0 to
dB in steps of 1 dB.
Table 20
Volume settings interpolator core
8.7.8.13
Auto mute
A 1-bit value to activate mute during out-of-lock. In normal
operation the output is automatically hard muted when an
out-of-lock situation is detected. Setting this bit to logic 0
will disable that function.
Table 21
Auto mute setting
BB3
BB2
BB1
BB0
LEVEL
FLAT
(dB)
MIN.
(dB)
MAX.
(dB)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
4
6
8
0
2
4
6
8
10
12
14
16
18
18
18
18
18
18
18
10
12
14
16
18
20
22
24
24
24
24
DE1
DE0
FUNCTION
0
0
1
1
0
1
0
1
other (default setting)
f
s
= 32.0 kHz
f
s
= 44.1 kHz
f
s
= 48.0 kHz
MT
FUNCTION
0
1
no muting
muting (default setting)
VC5
VC4
VC3
VC2
VC1
VC0
VOLUME
(dB)
0
0
0
0
:
1
1
1
1
1
0
0
0
0
:
1
1
1
1
1
0
0
0
0
:
1
1
1
1
1
0
0
0
0
:
0
1
1
1
1
0
0
1
1
:
1
0
0
1
1
0
1
0
1
:
1
0
1
0
1
0
0
1
2
:
58
59
60
Auto MT
FUNCTION
0
1
do not mute output during out-of-lock
mute output during out-of-lock (default
setting)
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