參數(shù)資料
型號(hào)： UDA1350AH
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 消費(fèi)家電
英文描述： IEC 958 audio DAC(IEC 958音頻轉(zhuǎn)換器)
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝： 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁(yè)數(shù)： 10/36頁(yè)
文件大?。?/td> 154K
代理商： UDA1350AH
1999 Dec 16
10
Philips Semiconductors
Preliminary specification
IEC 958 audio DAC
UDA1350AH
8.2
Clock regeneration and lock detection
The UDA1350AH contains an on-board PLL for
regenerating a system clock from the IEC 958 input
bitstream or the incoming digital data stream via the data
input interface. In addition to the system clock for the
on-board digital sound processing the PLL also generates
a 256f
s
clock output for use in the application. In the
absence of an input signal the clock will generate a
minimum frequency to warrant system functionality.
When the on-board clock has locked to the incoming
frequency the lock indicator bit will be set and can be read
via the L3 interface. Internally the PLL lock indication is
combined with the PCM status bit of the input data stream.
When both the IEC 958 decoder and the on-board clock
have locked to the incoming signal and the input data
stream is PCM data, then pin LOCK will be asserted.
However, when the IC is locked but the PCM status bit
reports non-PCM data then pin LOCK is returned to LOW
level.
The lock indication output can be used, for example, for
muting purposes.
8.3
Mute
The UDA1350AH is equipped with a cosine roll-off mute in
the DSP data path of the DAC part. Muting the DAC, by
pin MUTE (in static mode) or via bit MT (in L3 mode) will
result in a soft mute as presented in Fig.3. The cosine
roll-off soft mute takes 32
×
32 samples = 24 ms at a
sampling frequency of 44.1 kHz.
When operating in the L3 control mode the device will
mute on start-up. In L3 mode it is necessary to explicitly
switch off the mute for audio output by means of the MT bit
in the L3 register.
In the L3 mode pin MUTE does not have any function (the
same holds for several other pins) and can either be left
open-circuit (since it has an internal pull-down resistor) or
be connected to ground.
8.4
Auto mute
By default the outputs of the digital data output interface
and the DAC will be muted until the IC is locked,
regardless the level on pin MUTE (in static mode) or the
state of bit MT of the sound feature register (in L3 mode).
In this way only valid data will be passed to the outputs.
This mute is done in the SPDIF interface and is a hard
mute, not a cosine roll-off mute.
If needed this muting can be bypassed by setting
bit AutoMT to logic 0 via the L3 interface. As a result the IC
will no longer mute during out-of-lock situations.
handbook, halfpage
mute
factor
0
10
30
0
0.8
MGS755
20
0.6
0.4
0.2
t (ms)
Fig.3 Mute as a function of raised cosine roll-off.
相關(guān)PDF資料
PDF描述
UDA1350ATS IEC 958 audio DAC
UDA1351 96 kHz IEC 958 audio DAC
UDA1351H 96 kHz IEC 958 audio DAC
UDA1351TS 96 kHz IEC 958 audio DAC
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UDA1350ATS 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:IEC 958 audio DAC
UDA1351 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:96 kHz IEC 958 audio DAC
UDA1351H 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:96 kHz IEC 958 audio DAC
UDA1351H/N1,551 功能描述:數(shù)模轉(zhuǎn)換器- DAC 96 KHZ SPDIF DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
UDA1351H/N1,557 功能描述:數(shù)模轉(zhuǎn)換器- DAC 96 KHZ SPDIF DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
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