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| 型號： | TSB14C01AI |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER |
| 中文描述： | 5V的電機(jī)及電子學(xué)工程師聯(lián)合會1394-1995背板收發(fā)器/仲裁者 |
| 文件頁數(shù)： | 22/31頁 |
| 文件大小： | 424K |
| 代理商： | TSB14C01AI |
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TSB14C01A, TSB14C01AI, TSB14C01AM
5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER
SGLS107A – FEBRUARY 1999 – REVISED NOVEMBER 1999
22
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
arbitration sequence
The arbitration sequence is the process that the TSB14C01A uses to arbitrate the bus between competing
modules.
arbitration number
The arbitration sequence uses a unique arbitration number for each module. This 6-bit number is the same as
the node physical_ID. When less than 6 bits are provided for the arbitration number, they occupy the MSBs of
the arbitration number. The remaining bits are zero-filled. The MSBs are transmitted first.
NOTE
If the serial bus is contained within a host backplane, it is expected that the arbitration number (i.e.,
physical_ID) is set by the host backplane at power up (e.g., with a built-in slot identifier or
configuration mechanism).
It is recommended that this number be software programmable to facilitate testing and to allow for consistent
system operation and repeatability.
priority
Within the arbitration sequence, the arbitration number is preceded by four bits that define a priority level. The
method by which priority is assigned is to be determined by the system integrator with two exceptions. The
lowest priority (all zeros) is reserved for fair arbitration and the highest priority (all ones) is reserved for cycle
start requests. This allows 14 priority levels to be used for the urgent arbitration process.
The use of an urgent priority class allows nodes to be granted a larger portion of the bandwidth on the bus. High
priority nodes are granted the bus before lower priority nodes during urgent allocation of the bus, allowing such
nodes to be granted more bandwidth.
In order to ensure forward progress, the lowest priority level is reserved for fair arbitration. This allows all nodes
arbitrating with this priority level to be allowed one fair access to the bus for each fairness interval. For fair
arbitration, the value of the arbitration number has a minimal impact on the allocation of the bus. Although nodes
with higher arbitration numbers are granted the bus sooner, there is only a small decrease in latency.
The 4-bit priority field is not used in isochronous arbitration. When arbitrating for an isochronous transfer, the
priority field is zero-filled.
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| TSB14C01AIPM | 制造商:TI 制造商全稱:Texas Instruments 功能描述:5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER |
| TSB14C01AM | 制造商:TI 制造商全稱:Texas Instruments 功能描述:5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER |
| TSB14C01AMHV | 制造商:TI 制造商全稱:Texas Instruments 功能描述:5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER |
| TSB14C01APM | 功能描述:1394 接口集成電路 5V 50/100Mbps Backplane PLC RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB14C01APMG4 | 功能描述:1394 接口集成電路 5V 50/100Mbps Backplane PLC RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
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