參數(shù)資料
型號： TP6508
英文描述： Pushbutton Switch; Actuator Diameter:0.078"; Circuitry:6PDT; Switch Operation:6 Changeover Push-Push; Contact Current Max:100mA; Leaded Process Compatible:Yes; Mounting Type:PCB; Switch Function:6PDT
中文描述： 顯卡
文件頁數(shù)： 95/134頁
文件大?。?/td> 600K
代理商： TP6508
P.92
GAREG Hex 21 : Hardware Cursor Pattern Start Address Register
This is a read/write register.
Default port address 87C4.
Default value after hardware reset is Hex 00,00.
PCI port address low 84.
D0-15
Memory address A6 to A21 for hardware cursor pattern
Bit 0-15
These bits would use to define the location in the display memory where the cursor pattern is stored .
The cursor pattern may be stored anywhere in the display memory but is generally stored in a non-
visible location (off-screen memory ) . We can set the line offset of hardware cursor pattern in
GAREG 26 bit-14 . Others , the start address of hardware cursor pattern has an address-alignment
limit as follows :
1) If GAREG 26 bit-14 = 0 ( line offset = 16 bytes ) , then the start address of hardware
cursor pattern must be 1k-byte alignment . It is easy to fill hardware cursor pattern data contiuously .
This register bit-mapping of memory address is : ( x : no used )
D0 ,D1 ,D2 ,D3 ,D4 ,D5 ,D6 ,D7 ,D8 ,D9 ,D10,D11,D12,D13,D14,D15
== x , x , x , x ,A10,A11,A12,A13,A14,A15,A16,A17,A18,A19,A20,A21
2) If GAREG 26 bit-14 = 1 ( line offset = 2048 bytes ) , then the start address of hardware
cursor pattern can be 64-byte alignment in the first 2048-byte memory address (A6-A10) of any
64x2048-byte memory segment (A17-A21) . It is useful for 1280x or 1600x display mode . This
register bit-mapping of memory address is : ( x : no used )
D0 ,D1 ,D2 ,D3 ,D4 ,D5 ,D6 ,D7 ,D8 ,D9 ,D10,D11,D12,D13,D14,D15
== A6 ,A7 ,A8 ,A9 ,A10, x , x , x , x , x , x ,A17,A18,A19,A20,A21
GAREG Hex 22 : Hardware Cursor X&Y Origin Register
This is a read/write register.
Default value after hardware reset is Hex 00,00.
Default port address 8BC4.
PCI port address low 88.
D0-5
D6-7
D8-13
D14-15
Hardware cursor X-size Xbit 0-5
Reserved
Hardware cursor Y-size Ybit 0-5
Reserved
Bit 0-5
These bits would use to define the X offset in pixels from the left edge of the pattern which will be
displayed at the cursor display position .
D0 ,D1 ,D2 ,D3 ,D4 ,D5
==XO0,XO1,XO2,XO3,XO4,XO5
Reserved
These bits would use to define the Y offset in pixels from the top edge of the pattern which will be
displayed at the cursor display position .
D8 ,D9 , D10,D11 ,D12 ,D13
==YO0,YO1,YO2,YO3,YO4,YO5
Reserved
Bit 6-7
Bit 8-13
Bit 14-15
GAREG Hex 23 : Hardware Cursor X Display Position Register
This is a read/write register.
Default port address 8FC4.
Default value after hardware reset is Hex 00,00.
PCI port address low 8C.
D0-7
D8-10
D11-15
Hardware cursor display X position bit 0-7
Hardware cursor display X position bit 8-10
Reserved
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