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參數(shù)資料
| 型號： | TP6508 |
| 英文描述： | Pushbutton Switch; Actuator Diameter:0.078"; Circuitry:6PDT; Switch Operation:6 Changeover Push-Push; Contact Current Max:100mA; Leaded Process Compatible:Yes; Mounting Type:PCB; Switch Function:6PDT |
| 中文描述： | 顯卡 |
| 文件頁數(shù)： | 56/134頁 |
| 文件大?。?/td> | 600K |
| 代理商： | TP6508 |
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P.53
Extended Indexed Register SREG C3 : VCLK0 Numerator Value Register
This is a read/write register.
Port address is Hex 3C5.
Default value after hardware reset is Hex 9C.
D0-6 VCLK0 numerator bit 0 to 6
D7
VCLK0 oscillation divider
Bit 0-6
This register,in conjunction with VCLK0 Denominator and Post Scalar Value
Register, is used to determine the frequency of video clock. These 7 bits
numerator (N), 7 bits denominator (D), and 1 bit post scalar (P), for each clock (VCLK)
determines its frequency according to the following expression:
OSC x [N+1] x [2P+2]
VCLK(MHz) =
[D+1]
This bit is used to divide the internal generated oscillation frequency. A logical 0
indicates to do it divided by two. A logical 1 indicates to do it divided by four.
Normally, we set to logical 1 when VCLK0 outputs frequency lower 50MHz.
, OSC= 14.318 (MHz)
Bit 7
Extended Indexed Register SREG C4 : VCLK1 Numerator Value Register
This is a read/write register.
Port address is Hex 3C5.
Default value after hardware reset is Hex A8.
D0-6 VCLK1 numerator bit 0 to 6
D7
VCLK1 oscillation divider
Bit 0-6
This register,in conjunction with VCLK1 Denominator and Post Scalar Value Register, is used to
determine the frequency of video clock .
This bit is used to divide the internal generated oscillation frequency. A logical 0 indicates to do it
divided by two. A logical 1 indicates to do it divided by four . Normally, we set to logical 1 when
VCLK1 outputs frequency lower 50MHz.
Bit 7
Extended Indexed Register SREG C5 : VCLK0 Denominator and Post Scalar Value
Register
This is a read/write register.
Port address is Hex 3C5.
Default value after hardware reset is Hex 83.
D0
D1-7 VCLK0 denominator bit 0 to 6
VCLK0 post scalar
Bit 0-7
This register,in conjunction with VCLK0 Numerator Value Register, is used to determine the fre-
quency of video clock.
Extended Indexed Register SREG C6 : VCLK1 Denominator and Post Scalar
Value Register
This is a read/write register.
Port address is Hex 3C5.
Default value after hardware reset is Hex A3.
D0
D1-7 VCLK1 denominator bit 0 to 6
VCLK1 post scalar
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