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參數(shù)資料
| 型號(hào)： | TP6508 |
| 英文描述： | Pushbutton Switch; Actuator Diameter:0.078"; Circuitry:6PDT; Switch Operation:6 Changeover Push-Push; Contact Current Max:100mA; Leaded Process Compatible:Yes; Mounting Type:PCB; Switch Function:6PDT |
| 中文描述： | 顯卡 |
| 文件頁數(shù)： | 32/134頁 |
| 文件大?。?/td> | 600K |
| 代理商： | TP6508 |
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P.29
age Controlled Oscillator and Post divide control.
The PLL parameters for dot /pixel clock (VCLK) are programed VCLK0 or VCLK1 set regs. in
SREG C3,C4,C5,C6 and for memory clock (MCLK) are programmed MCLK set regs. in SREG C9,CA.
These registers uses to be in conjunction with Denominator and Post Scalar Value Register, is used to
determine the frequency of VGA dot clock. These 7 bits numerator (N), 7 bits denominator (D), and 1
bit post scalar (P), for each clock (MCLK or VCLK) determines its frequency according to the follow-
ing expression:
OSC x [N+1] x [2P+2] .
[D+1]
MCLK, VCLK(MHz) =
OSC = reference frequency / 14.318 MHz
The reference frequency can be generated with an internal crystal controlled oscillator. Alter-
natively, it can be supplied from an external TTL source by XTAL1 Pin input. A optional feature is
implemented that directs TP6508 to provide the memory clock and the display clock from MCLK and
VCLK pin.
True-Color Palette DAC (TDAC)
The True-Color Palette DAC block contains the true color Palettes and three 6-bit or 8-bit digi-
tal-to-analog converters. It contains three 256x8 color LUT RAMs for all color mode with the capa-
bility to display up to 16.8 million colors simultaneously in both RGB and BGR HiCOLOR-24
TM
formats. It also support both the popular HiCOLOR-15
TM
format which uses 5 bits/primary color and
the HiCOLOR-16
TM
color format which uses 5 bits for red , 6 bits for the green , and 5 bit for the blue
primary color. The total colors available using the HiCOLOR-15
TM
format are 32768 while the
HiCOLOR-16
TM
format provides 65536 colors.
When the True-Color (16.8M) and Hi-Color (32k/64k) mode isn't activated , it behaves exactly
as Pseudo Color format compatible RAMDAC. The color palette, with 256x18-bit entries, converts a
color code that specifies the color of pixel into three 6-bit values, one each for red, green, and blue.
It also provides a Monitor Sense logic to output a signal to Input Status #0 Register for determin-
ing the presence of the CRT monitor. This output is a logical 0 if one or more of the Red, Green, Blue
outputs have exceeded the internal voltage reference level by being connected a loaded or unloaded
RGB line. After the VGA BIOS programed the palettes and determined the color/mono or no CRT
monitor, we can disable the Monitor Sense logic for saving power consumption.
Graphics Engine Controller (GEC)
The Graphics Engine controller generates the control signals for BITBLT (screen-to-screen, host-
to-screen) , Color Expansion (1-bit-per-pixel , font-painting) , Line Drawing , Rectangular Clipping ,
Rectangular Fill, Pattern Fill, Transparence, and Raster operations. They are specifically designed to
speed up applications running under GUI environments such as Windows 3.x , Windows applications ,
X-windows , Autocad , and other CAD/CAM packages.
It maintains memory address to locate data in display memory and combines the Source data
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