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參數資料
| 型號： | TLV5592 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 2-BIT ANALOG-TO-DIGITAL CONVERTER FOR FLEX PAGER CHIPSET |
| 中文描述： | 2位模擬數字轉換器對于Flex尋呼機芯片組 |
| 文件頁數： | 5/15頁 |
| 文件大?。?/td> | 208K |
| 代理商： | TLV5592 |
TLV5592
2-BIT ANALOG-TO-DIGITAL CONVERTER
FOR FLEX PAGER CHIPSET
SLAS145A – JUNE1996 – REVISED DECEMBER 1997
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range,
AV
DD
= DV
DD
= 1.8 V to 2.5 V, f
(CLK)
= 38.4 kHz (unless otherwise noted)
power
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
μ
A
IDD
Operating supply current
Fast track, slow track, or hold mode
250
IDD(standby)
Standby supply current
VI(DC OFFSET) = 0.8 V, VI(SIG) = 0.8 V
For all digital inputs,
0 < VI < 0.5 V or VI > DVDD –0.5 V.
1
μ
A
digital
PARAMETER
TEST CONDITIONS
IOH = –100
μ
A
IOL = 100
μ
A
VI = DVDD
VI = 0
MIN
TYP
MAX
UNIT
VOH
VOL
IIH
IIL
Ci
High-level output voltage
DVDD –0.5
V
Low-level output voltage
0.5
V
μ
A
μ
A
pF
High-level input current
1
2.5
Low-level input current
–1
–2.5
Input capacitance, digital input
10
analog
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Voltage accuracy at MID
VDD = 2 V,
f(IN) = 1.0 kHz
CL(MID) = 220 nF
1.42
1.0
1.05
V
Zi
Zi(offset)
II(SIG)
Ci
NOTE 3: The input is capacitive and, therefore, is dynamic. Impedance specifications are based on f(CLK) = 38.4 kHz.
Input impedance at SIG (see Note 3)
1
M
M
Input impedance at DC OFFSET (see Note 3)
1
3
Average input current into SIG
GND < VI < AVDD
100
nA
Input capacitance, all inputs
10
pF
operating characteristics over recommended operating free-air temperature range,
AV
DD
= DV
DD
= 3 V, f
(CLK)
= 38.4 kHz (unless otherwise noted)
peak-and-valley DACs
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
Step size, LSB
VDD/255
EFS
EZS
Full-scale error
1
LSB
Zero-code error
3
LSB
Voltage output drift
Hold mode
0
mV/ms
ED
Differential nonlinearity (DNL) error
1
LSB
low-pass filter
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
G
Pass-band filter gain
VI(DC OFFSET) = 0.8 V,
VI =
±
500 mV
VI =
±
500 mV
Off mode to hold mode (see Table 1)
VI =
±
125 mV
fI(SIG) = 1 kHz
fI(SIG) = 2 kHz
5.75
6
6.25
dB
Filter attenuation
1-kHz filter
2
3
4
dB
2-kHz filter
2
3
4
ts
Stabilization time
5
ms
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TLV5592D | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2-BIT ANALOG-TO-DIGITAL CONVERTER FOR FLEX PAGER CHIPSET |
| TLV5592ED | 制造商:Texas Instruments 功能描述: |
| TLV5592EDR | 制造商:Texas Instruments 功能描述: |
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