參數(shù)資料
型號(hào)： TLV5592
廠商： Texas Instruments, Inc.
英文描述： 2-BIT ANALOG-TO-DIGITAL CONVERTER FOR FLEX PAGER CHIPSET
中文描述： 2位模擬數(shù)字轉(zhuǎn)換器對(duì)于Flex尋呼機(jī)芯片組
文件頁(yè)數(shù)： 4/15頁(yè)
文件大小： 208K
代理商： TLV5592
TLV5592
2-BIT ANALOG-TO-DIGITAL CONVERTER
FOR FLEX PAGER CHIPSET
SLAS145A – JUNE1996 – REVISED DECEMBER 1997
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, AV
DD
, DV
DD
Input voltage range, V
I
Output voltage range, EXTS0, EXTS1
Offset input voltage, V
IO
Peak input current (any input)
Operating free-air temperature range, T
A
Storage temperature range, T
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
–0.5 V to 6.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–0.3 V to AV
DD
+ 0.3 V
–0.3 V to DV
DD
+ 0.3 V
–0.3 V to AV
DD
+ 0.3 V
±
20 mA
–20
°
C to 65
°
C
–65
°
C to 150
°
C
260
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage, AVDD, DVDD
Power supply ripple
1.8
2.5
V
0.001
Vpp
kHz
Input clock frequency, f(CLK)
Input clock duty cycle
38.4
45
50
55
%
Voltage offset applied at DC OFFSET, VI(DC OFFSET) (see Note 2)
Analog input voltage, VI(pp) (See Note 1 )
High-level control input voltage, VIH
Low-level control input voltage, VIL
Operating free-air temperature, TA
0.25
VDD–0.25
VIO+0.355
0.2 DVDD
V
VDD = 2.0 V
VDD = 1.8 V to 2.4 V
VDD = 1.8 V to 2.4 V
VIO–0.355
Vpp
V
0.8 DVDD
–25
V
65
°
C
NOTES:
1. The TLV5592 functions and operates down to 1.8 V. Full electrical specifications are ensured from 1.8 to 2.5 V, unless otherwise
noted.
VDD
2
2.
V
I(MAX MIN)
V
IO
0.25
(
FILTER MAX GAIN)
This equation is valid for input sinusoids of less than 800 Hz.
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