參數(shù)資料
型號： TLV320AIC3106_0706
廠商： Texas Instruments, Inc.
元件分類： Codec
英文描述： LOW-POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
中文描述： 低功耗立體聲音頻編解碼器的便攜式音頻/電話
文件頁數(shù)： 48/102頁
文件大?。?/td> 1259K
代理商： TLV320AIC3106_0706
www.ti.com
TLV320AIC3106
SLAS509B–DECEMBER 2006–REVISED JUNE 2007
Page 0 / Register 4:
PLL Programming Register B
BIT
READ/
WRITE
R/W
RESET
VALUE
000001
DESCRIPTION
D7–D2
PLL J Value
000000: Reserved, do not write this sequence
000001: J = 1
000010: J = 2
000011: J = 3
…
111110: J = 62
111111: J = 63
Reserved, write only zeros to these bits
D1–D0
R/W
00
Page 0 / Register 5:
PLL Programming Register C
(1)
BIT
READ/
WRITE
R/W
RESET
VALUE
00000000
DESCRIPTION
D7-D0
PLL D value – Eight most significant bits of a 14-bit unsigned integer valid values for D are from
zero to 9999, represented by a 14-bit integer located in Page-0/Reg-5-6. Values should not be
written into these registers that would result in a D value outside the valid range.
(1)
Note that whenever the D value is changed, register 5 should be written, immediately followed by register 6. Even if only the MSB or
LSB of the value changes, both registers should be written.
Page 0 / Register 6:
PLL Programming Register D
BIT
READ/
WRITE
R/W
RESET
VALUE
00000000
DESCRIPTION
D7–D2
PLL D value – Six least significant bits of a 14-bit unsigned integer valid values for D are from
zero to 9999, represented by a 14-bit integer located in Page-0/Reg-5-6. Values should not be
written into these registers that would result in a D value outside the valid range.
Reserved, write only zeros to these bits.
D1-D0
R
00
Page 0 / Register 7:
Codec Datapath Setup Register
BIT
READ/
WRITE
R/W
RESET
VALUE
0
DESCRIPTION
D7
Fsref setting
This register setting controls timers related to the AGC time constants.
0: Fsref = 48-kHz
1: Fsref = 44.1-kHz
ADC Dual rate control
0: ADC dual rate mode is disabled
1: ADC dual rate mode is enabled
Note: ADC Dual Rate Mode must match DAC Dual Rate Mode
DAC Dual Rate Control
0: DAC dual rate mode is disabled
1: DAC dual rate mode is enabled
Left DAC Datapath Control
00: Left DAC datapath is off (muted)
01: Left DAC datapath plays left channel input data
10: Left DAC datapath plays right channel input data
11: Left DAC datapath plays mono mix of left and right channel input data
Right DAC Datapath Control
00: Right DAC datapath is off (muted)
01: Right DAC datapath plays right channel input data
10: Right DAC datapath plays left channel input data
11: Right DAC datapath plays mono mix of left and right channel input data
Reserved. Only write zero to this register.
D6
R/W
0
D5
R/W
0
D4–D3
R/W
00
D2–D1
R/W
00
D0
R/W
0
48
Submit Documentation Feedback
相關PDF資料
PDF描述
TLV320AIC3106IGQE LOW-POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
TLV320AIC3106IGQER LOW-POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
TLV341_07 LOW-VOLTAGE RAIL-TO-RAIL OUTPUT CMOS OPERATIONAL AMPLIFLERS WITH SHUTDOWN
TLV431ACDBV LOW-VOLTAGE ADJUSTABLE PRECISION SHUNT REGULATORS
TLV431ID LOW-VOLTAGE ADJUSTABLE PRECISION SHUNT REGULATORS
相關代理商/技術參數(shù)
參數(shù)描述
TLV320AIC3106EVM 功能描述:音頻 IC 開發(fā)工具 TLV320AIC3106 Eval Mod RoHS:否 制造商:Texas Instruments 產品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
TLV320AIC3106EVM-K 功能描述:音頻 IC 開發(fā)工具 TLV320AIC3106EVM-K Eval Mod RoHS:否 制造商:Texas Instruments 產品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
TLV320AIC3106IGQE 制造商:Texas Instruments 功能描述:AUD CODEC 2ADC / 2DAC 24BIT 80BGA - Trays
TLV320AIC3106IGQER 制造商:Texas Instruments 功能描述:AUD CODEC 2ADC / 2DAC 24BIT 80BGA - Tape and Reel
TLV320AIC3106IRGZR 功能描述:接口—CODEC Lo-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*