參數(shù)資料
型號: SN74ABT182502A
廠商: Texas Instruments, Inc.
英文描述: Scan Test Devices With 18-Bit Universal Bus Transceivers(掃描測試裝置(帶18位通用總線收發(fā)器))
中文描述: 掃描測試設(shè)備與18位通用總線收發(fā)器(掃描測試裝置(帶18位通用總線收發(fā)器))
文件頁數(shù): 22/35頁
文件大?。?/td> 738K
代理商: SN74ABT182502A
SN54ABT18502A, SN54ABT182502A, SN74ABT18502A, SN74ABT182502A
SCAN TEST DEVICES WITH
18-BIT UNIVERSAL BUS TRANSCEIVERS
SCBS488 – AUGUST 1994
22
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
simultaneous PSA and binary count up (PSA/COUNT)
Data appearing at the selected device input-mode I/O pins is compressed into an 18-bit parallel signature in the
shift-register elements of the selected input-mode BSCs on each rising edge of TCK. At the same time, an 18-bit
binary count-up pattern is generated in the shift-register elements of the selected output-mode BSCs on each
rising edge of TCK, updated in the shadow latches, and applied to the associated device I/O pins on each falling
edge of TCK. Figures 11 and 12 illustrate the 18-bit linear-feedback shift-register algorithms through which the
signature is generated. An initial seed value should be scanned into the BSR before performing this operation.
1B8-I/O
1B7-I/O
1B6-I/O
1B5-I/O
1B4-I/O
1B3-I/O
1B2-I/O
1B1-I/O
1B9-I/O
1A7-I/O
1A6-I/O
1A5-I/O
1A4-I/O
1A3-I/O
1A2-I/O
1A1-I/O
1A8-I/O
1A9-I/O
2A7-I/O
2A6-I/O
2A5-I/O
2A4-I/O
2A3-I/O
2A2-I/O
2A1-I/O
2A8-I/O
2A9-I/O
2B8-I/O
2B7-I/O
2B6-I/O
2B5-I/O
2B4-I/O
2B3-I/O
2B2-I/O
2B1-I/O
2B9-I/O
MSB
LSB
=
=
Figure 11. 18-Bit PSA/COUNT Configuration (1OEAB = 2OEAB = 0, 1OEBA = 2OEBA = 1)
P
相關(guān)PDF資料
PDF描述
SN74ABT18502A Scan Test Devices With 18-Bit Universal Bus Transceivers(掃描測試裝置(帶18位通用總線收發(fā)器))
SN54ABT182502A Scan Test Devices With 18-Bit Universal Bus Transceivers(掃描測試裝置(帶18位通用總線收發(fā)器))
SN54ABT18502A Scan Test Devices With 18-Bit Universal Bus Transceivers(掃描測試裝置(帶18位通用總線收發(fā)器))
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