參數(shù)資料
型號: SMJ320C6414DGADW60
廠商: TEXAS INSTRUMENTS INC
元件分類: 數(shù)字信號處理
英文描述: 64-BIT, 75 MHz, OTHER DSP, CPGA570
封裝: 33 X 33 MM, CERAMIC, FCPGA-570
文件頁數(shù): 100/134頁
文件大小: 1997K
代理商: SMJ320C6414DGADW60
SMJ320C6414, SMJ320C6415, SMJ320C6416
FIXEDPOINT DIGITAL SIGNAL PROCESSORS
SGUS050A JANUARY 2004 REVISED MARCH 2004
68
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
clock PLL (continued)
PLLMULT
1
0
PLLCLK
CLKMODE0
CLKMODE1
CLKIN
C2
C1
EMI
filter
3.3 V
/2
/8
/4
/6
00 01 10
CPU Clock
Peripheral Bus
Timer Internal Clock
CLKOUT4,
McBSP Internal Clock
CLKOUT6
ECLKIN_SEL (DEVCFG.[17,16]
and DEVCFG.[15,14])
/2
/4
EMIF
00 01 10
EK2RATE
(GBLCTL.[19,18])
ECLKOUT2
ECLKOUT1
PLL
x6, x12
10
F 0.1 F
ECLKIN
(For the PLL Options, CLKMODE Pins Setup, and
PLL Clock Frequency Ranges, see Table 32.)
Internal to C64x
PLLV
NOTES: A. Place all PLL external components (C1, C2, and the EMI Filter) as close to the C6000
DSP device as possible. For the best
performance, TI recommends that all the PLL external components be on a single side of the board without jumpers, switches, or
components other than the ones shown.
B. For reduced PLL jitter, maximize the spacing between switching signals and the PLL external components (C1, C2, and the EMI
Filter).
C. The 3.3-V supply for the EMI filter must be from the same 3.3-V power plane supplying the I/O voltage, DVDD.
D. EMI filter manufacturer TDK part number ACF451832-333, -223, -153, -103. Panasonic part number EXCCET103U.
Figure 5. External PLL Circuitry for Either PLL Multiply Modes or x1 (Bypass) Mode
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