參數(shù)資料
型號(hào)： SA2400A
廠商： NXP Semiconductors N.V.
英文描述： Single chip transceiver for 2.45 GHz ISM band
中文描述： 單為2.45 GHz的ISM頻帶收發(fā)器芯片
文件頁(yè)數(shù)： 14/34頁(yè)
文件大?。?/td> 325K
代理商： SA2400A
Philips Semiconductors
Product data
SA2400A
Single chip transceiver for 2.45 GHz ISM band
2002 Nov 04
14
Specification
Units
Max
Typ
Min
Conditions
IQ input timing
Digital input selected, sampling on falling edge,
l i
REF CLK OUT
relative to REF_CLK_OUT
Set-up time
–
4
–
ns
Hold time
–
4
–
ns
NOTES:
1. The 44 MHz common mode digital ground bounce on the I and Q inputs is assumed to be less than –30 dBc relative to signal level.
2. Verified by bench characterization and found to have sufficient margin for production.
3. The power ramping-up delay can be programmed to 2, 3, 4, 5
μ
s. See the 3-wire bus control register map. The default is 2
μ
s.
4. The differential input signal current is the difference between the I and /I (Q and /Q) instantaneous currents. The peak differential current is
therefore (I
max
–I
min
)/2 = 500
μ
A.
11. VCO AND SYNTHESIZER
Table 9 lists the synthesizer specifications. The synthesizer has the same specification as the SA8027 fractional PLL main loop without the PHI
speed-up mode. The phase comparator frequency used is typically 4 MHz (in fractional mode). The charge pump current is internally
programmed using the 3-wire bus (Synthesizer Register C). The recommended charge pump current is 480
μ
A. An external reference input of
44 MHz or 22 MHz is supported.
Table 9. Synthesizer and VCO Specifications
T
amb
= 25
°
C; V
CC
= +3 V
PARAMETER
TEST CONDITIONS
LIMITS
UNITS
Min
Typ
Max
VCO
VCO output frequency range
VCO gain (K
VCO
)
Open Loop VCO Phase Noise
External VCO input levels
2.4
70
–
–10
–
85
–113
–
2.5
100
–107
0
GHz
MHz/V
dBc/Hz
dBm
V
tune
= 1.2 V
Note 1. 1/f
2
roll off region; 0.5 MHz offset
Differential; when device configured for
external VCO
Main divider
N divider range
Reference divider
Fixed reference input (XTAL_1 and XTAL_2)
frequency
512
–
65535
–
–
4
350
10
–
22
44
–
–
–
–
–
–
1023
1300
–
1.5
MHz
MHz
R divider range (non-fractional)
Reference input level
Input parallel resistance (XTAL_1, XTAL_2)
Input parallel capacitance (XTAL_1, XTAL_2)
Phase detector
Phase detector frequency
Charge pump
Charge pump current accuracy
Charge pump compliance voltage
Output current variation vs. V
cp
(Note 2)
Charge pump sink to source current
Matching
SM = ‘000’
XTAL_1 input
f = 44 MHz; indicative, not tested
f = 44 MHz; indicative, not tested
mV
pp
k
pF
–
–
4.0
MHz
V
cp
= 0.5 V
CC
–20
0.6
–5
–10
–
–
–
–
+20
V
DD
0.7
+5
+10
%
V
%
%
V
cp
in compliance range
V
cp
= 0.5 V
CC
Charge pump “off” current leakage
NOTES:
1. This is measured at the Output1 RF port with the SA2400A in transmit mode, with static DC offset signals to the transmitter I and Q inputs.
The phase detector and divide-by-N phase noise is such that when configured as a phase locked loop with a 30 kHz loop band width, the
phase noise at frequencies between 1 kHz and 30 kHz will be no worse than –80 dBc/Hz. The total closed loop spur power within a 22 MHz
band around the carrier is less than –30 dBc.
I
ZOUT
I
OUT
with I
1
@ V
1
= 0.6 V, I
2
@ V
2
= V
CC
– 0.7 V (see Figure 4).
V
cp
= 0.5 V
CC
–5
±
1
5
nA
2. The relative output current variation is defined as:
2
(I
2
I
2
I
1
)
I
1
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