S1C88348/317/316/308 TECHNICAL HARDWARE
EPSON
I-73
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Ports)
P00D–P07D, P10D–P17D: 00FF62H, 00FF63H
How I/O port terminal Pxx data readout and
output data settings are performed.
When writing data:
When "1" is written: HIGH level
When "0" is written: LOW level
When the I/O port is set to output mode, the data
written is output as is to the I/O port terminal. In
terms of port data, when "1" is written, the port
terminal goes to HIGH (VDD) level and when "0" is
written to a LOW (VSS) level.
Even when the port is in input mode, data can still
be written in.
When reading out data:
When "1" is read:
HIGH level ("1")
When "0" is read:
LOW level ("0")
When an I/O port is in input mode, the voltage
level being input to the port terminal is read out.
When terminal voltage is HIGH (VDD), it is read as
a "1", and when it is LOW (VSS), it is read as a "0".
Furthermore, in output mode, the contents of the
data register are read out.
At initial reset, this register is set to "1" (HIGH
level).
Note: The data registers of I/O ports set for the
data bus and output terminal of serial
interface can be used as general purpose
registers with read/write capabilities which
do not affect I/O activities of the terminals.
IOC00–IOC07: 00FF60H
IOC10–IOC17: 00FF61H
Sets the I/O ports to input or output mode.
When "1" is written: Output mode
When "0" is written: Input mode
Reading:
Valid
IOCxx is the I/O control register which correspond
to each I/O port in a bit unit.
Writing "1" to the IOCxx register will switch the
corresponding I/O port Pxx to output mode, and
writing "0" will switch it to input mode.
When the analog comparator is used, "0" must
always be set for the I/O control registers (IOC14–
IOC15 or IOC16–IOC17, or both) of I/O ports
which will become input terminals.
At initial reset, this register is set to "0" (input
mode).
Note: The data registers of I/O ports set for the
data bus and input terminal of serial inter-
face can be used as general purpose
registers with read/write capabilities which
do not affect I/O activities of the terminals.
5.7.5 Programming notes
(1) When changing the port terminal from LOW
level to HIGH with the built-in pull-up resistor,
a delay in the waveform rise time will occur
depending on the time constant of the pull-up
resistor and the load capacitance of the termi-
nal. It is necessary to set an appropriate wait
time for introduction of an I/O port. Make this
wait time the amount of time or more calculated
by the following expression.
Wait time = RIN x (CIN + load capacitance on the
board) x 1.6 [sec]
RIN: Pull up resistance Max. value
CIN: Terminal capacitance Max. value
(2) When the analog comparator is used, "0" must
always be set for the I/O control registers
(IOC14–IOC15 or IOC16–IOC17, or both) of I/O
ports which will become input terminals.