參數(shù)資料
型號(hào): S1C88348F
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PQFP16
封裝: PLASTIC, QFP8-160
文件頁(yè)數(shù): 30/344頁(yè)
文件大?。?/td> 2401K
代理商: S1C88348F
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S1C88348/317/316/308 TECHNICAL HARDWARE
EPSON
I-113
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer)
CONT0, CONT1: 00FF31HD2, 00FF32HD2
Select the continuous/one-shot mode.
When "1" is written: Continuous mode
When "0" is written: One-shot mode
Reading:
Valid
Select whether timer 0 will be used in the continu-
ous mode or in the one-shot mode.
By writing "1" to CONT0, the programmable timer is
set to the continuous mode. In the continuous mode,
the initial counter value is automatically loaded
when an underflow is generated, and counting is
continued. On the other hand, when writing "0" to
CONT0, the programmable timer is set to the one-
shot mode. The counter loads an initial value and
stops when an underflow is generated. At this time,
PRUN0 is automatically reset to "0".
In the same way, the continuous/one-shot mode
for timer 1 is selected by CONT1. (In the one-shot
mode for timer 1, PRUN1 is automatically reset to
"0" when the counter underflow is generated.)
At initial reset, this register is set to "0" (one-shot
mode).
RLD00–RLD07: 00FF33H
RLD10–RLD17: 00FF34H
Sets the initial value for the counter.
RLD00–RLD07:
Reload data for Timer 0
RLD10–RLD17:
Reload data for Timer 1
The reload data set in this register is loaded into the
respective counters and is counted down with that
as the initial value.
Reload data is loaded to the counter under two
conditions, when "1" is written to PSET0 or PSET1
and when the counter underflow automatically
loads.
At initial reset, this register is set to "FFH".
PTD00–PTD07: 00FF35H
PTD10–PTD17: 00FF36H
Data of the programmable timer can be read out.
PTD00–PTD07:
Timer 0 counter data
PTD10–PTD17:
Timer 1 counter data
These bits act as a buffer to maintain the counter
data during readout, and the data can be read as
optional timing. However, in the 16-bit mode, to
avoid a read error, (data error when a borrow from
timer 0 to timer 1 is generated in the middle of
reading PTD00–PTD07 and PTD10–PTD17),
PTD10–PTD17 latches the timer 1 counter data
according to the reading of PTD00–PTD07.
The latched status of PTD10–PTD17 is canceled
according to the readout of PTD10–PTD17 or when
0.73–1.22 msec (depends on the readout timing) has
elapsed. Therefore, in 16-bit mode, be sure to read
the counter data of PTD00–PTD07 and PTD10–
PTD17 in order.
Since these bits are exclusively for reading, the
write operation is invalid.
At initial reset, these bits are set to "FFH".
PSET0, PSET1: 00FF31HD1, 00FF32HD1
Presets the reload data to the counter.
When "1" is written: Preset
When "0" is written: No operation
Reading:
Always "0"
By writing "1" to PSET0, the reload data in PLD00–
PLD07 is preset to the counter of timer 0. When the
counter of timer 0 is preset in the RUN status, it
restarts immediately after presetting.
In the case of STOP status, the reload data that has
been preset is maintained.
No operation results when "0" is written.
In the same way, the reload data in PLD10–PLD17
is preset to the counter of timer 1 by PSET1.
When the 16-bit mode is selected, writing "1" to
PSET1 is invalid.
This bit is exclusively for writing, it always be-
comes "0" during reading.
PRUN0, PRUN1: 00FF31HD0, 00FF32HD0
Controls the RUN/STOP of the counter.
When "1" is written: RUN
When "0" is written: STOP
Reading:
Valid
The counter of timer 0 starts down-counting by
writing "1" to PRUN0 and stops by writing "0".
In the STOP status, the counter data is maintained
until it is preset or set in the next RUN status. Also,
when the STOP status changes to the RUN status,
the data that was maintained can be used for
resuming the count.
In the same way, the RUN/STOP of the timer 1
counter is controlled by PRUN1.
When the 16-bit mode is selected, PRUN1 is fixed at
"0".
At initial reset and when an underflow is generated
in the one-shot mode, this register is set to "0"
(STOP).
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