S1C88348/317/316/308 TECHNICAL HARDWARE
EPSON
I-191
10 PRECAUTIONS ON MOUNTING
<Oscillation Circuit>
q Oscillation characteristics change depending on
conditions (board pattern, components used,
etc.).
In particular, when a ceramic oscillator or
crystal oscillator is used, use the oscillator
manufacturer's recommended values for
constants such as capacitance and resistance.
q Disturbances of the oscillation clock due to
noise may cause a malfunction. Consider the
following points to prevent this:
(1) Components which are connected to the
OSC1, OSC2, OSC3 and OSC4 terminals,
such as oscillators, resistors and capacitors,
should be connected in the shortest line.
(2) As shown in the right hand figure, make a
VSS pattern as large as possible at circum-
scription of the OSC1, OSC2, OSC3 and
OSC4 terminals and the components
connected to these terminals.
Furthermore, do not use this VSS pattern for
any purpose other than the oscillation
system.
OSC4
OSC3
VSS
Sample VSS pattern
(3) When supplying an external clock to the
OSC1 (OSC3) terminal, the clock source
should be connected to the OSC1 (OSC3)
terminal in the shortest line.
Furthermore, do not connect anything else
to the OSC2 (OSC4) terminal.
q In order to prevent unstable operation of the
oscillation circuit due to current leak between
OSC1 (OSC3) and VDD, please keep enough
distance between OSC1 (OSC3) and VDD or
other signals on the board pattern.
10 PRECAUTIONS ON MOUNTING
<Reset Circuit>
q The power-on reset signal which is input to the
RESET terminal changes depending on condi-
tions (power rise time, components used, board
pattern, etc.).
Decide the time constant of the capacitor and
resistor after enough tests have been completed
with the application product.
When the built-in pull-up resistor is added to
the RESET terminal by mask option, take into
consideration dispersion of the resistance for
setting the constant.
q In order to prevent any occurrences of unneces-
sary resetting caused by noise during operating,
components such as capacitors and resistors
should be connected to the RESET terminal in
the shortest line.
<Power Supply Circuit>
q Sudden power supply variation due to noise
may cause malfunction. Consider the following
points to prevent this:
(1) The power supply should be connected to the
VDD and VSS terminals with patterns as short
and large as possible.
(2) When connecting between the VDD and VSS
terminals with a bypass capacitor, the terminals
should be connected as short as possible.
VDD
VSS
Bypass capacitor connection example
VDD
VSS
(3) Components which are connected to the VD1,
VC1–VC5 and CA–CE terminals, such as capaci-
tors, should be connected in the shortest line.
In particular, the VC1–VC5 voltages affect the
display quality.
q Do not connect anything to the VC1–VC5 and
CA–CE terminals when the LCD driver is not
used.