參數(shù)資料
型號: S1C88104P0A0100
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PBGA240
封裝: VFBGA10H-216
文件頁數(shù): 91/211頁
文件大?。?/td> 1802K
代理商: S1C88104P0A0100
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172
EPSON
S1C8F626 TECHNICAL MANUAL
APPENDIX A S5U1C88000P1&S5U1C88655P2 MANUAL (Peripheral Circuit Board for S1C8F626)
Pull-up resistance value
The pull-up resistance values on this board are
set to 300 k
which differ from those for the
actual IC. For the resistance values on the
actual IC, refer to Chapter 9, "ELECTRICAL
CHARACTERISTICS".
Note that when using pull-up resistors to pull
the input terminals high, the input terminals
may require a certain period to reach a valid
high level. Exercise caution if a key matrix
circuit is configured using a combination of
output and input ports, since rise delay times
on these input ports differ from those of the
actual IC.
(2) Differences in current consumption
The amount of current consumed by this board
differs significantly from that of the actual IC.
Inspecting the LEDs on the S5U1C88000P1
front panel may help keep track of approxi-
mate current consumption. The following
factors/components greatly affect device
current consumption:
Those which can be verified by LEDs
and monitor pins
a) Run and Halt execution ratio
(verified by LEDs and monitor pins on the
ICE)
b) CPU operating clock change control
(LED 4: monitor pin 4)
c) OSC3 oscillation on/off control
(LED 5: monitor pin 5)
d) SVD circuit on/off control
(LED 6: monitor pin 6)
e) LCD power supply control
(LED 7: monitor pin 7)
f) Heavy load protection mode
(LED 8: monitor pin 8)
g) SLEEP and Halt execution ratio
(LED 9: monitor pin 9)
h) LCD voltage regulator power selection
(LED 10: monitor pin 10)
i) Power voltage booster
(LED 11: monitor pin 11)
j) Operating mode selected
(LED 13: monitor pin 13)
k) OSC1 operating clock
(LED 14: monitor pin 14)
l) OSC3 operating clock
(LED 15: monitor pin 15)
Those that can only be counteracted
by system or software
m) Current consumed by the internal pull-up
resistors
n) Input ports in a floating state
(3) Functional precautions
LCD circuit
Pay attention to the output drive capability
and output voltage of the LCD terminals (SEG,
COM), since they are different from those of
the actual IC. The system and the software
should be designed in order to adjust the LCD
contrast. The S5U1C88000P1 board allows
switching of the LCD drive voltage with its
switch on the back side. (Refer to Section A.1,
"Names and Functions of Each Part")
When the LCDC0 and LCDC1 registers are
both set to "0" (LCD power control circuit is
off), the SEG and COM terminal outputs of the
actual IC are fixed at VSS level. Note, however,
that the COM outputs are fixed at VC4 level
and the SEG outputs are fixed at VC3 level in
this board.
This board supports 16
× 16/5 × 8 dot font only
and 12
× 12 dot font can not be used. (Writing
and reading to/from DTFNT bit are enabled.)
This board does not support reversing of the
SEG assignment using the SEGREV bit. Check
whether LED12 is lit or not to confirm the
SEGREV status. (Writing and reading to/from
SEGREV bit are enabled.)
The actual IC outputs only COM0 to COM15
signals even if the display area is switched
(DSPAR = "1") when the LCD driver is set to
1/16 (or 1/8) duty drive. This board outputs
COM16 to COM31 signals with the same
waveform as the COM0 to COM15. Therefore,
if COM16 to COM31 along with COM0 to
COM15 are connected to the LCD panel, the
LCD panel displays the same contents twice to
the upper half and lower half.
SVD circuit
The SVD function is realized by artificially
varying the power supply voltage using the
VSVD control on the front panel of the
S5U1C88000P1.
There is a finite delay time from when the
power to the SVD circuit turns on until actual
detection of the voltage. The delay time on this
board differs from that of the actual IC. Refer
to Chapter 9, "ELECTRICAL CHARACTERIS-
TICS" when setting the appropriate wait time
for the actual IC.
The evaluation voltages supported in this
board are different from those of the actual IC.
When debugging the SVD operation using this
board, evaluate the SVD results as levels not
voltages.
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