S1C8F626 TECHNICAL MANUAL
EPSON
35
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Oscillation Circuits and Operating Mode)
5.4.6 Switching the operating mode
The S1C8F626 has two operating modes.
1. Normal operation mode
This mode executes the program stored in the
Flash EEPROM (normal operation).
VDD = 1.8 to 3.6 V,
internal operating voltage VD1 = 1.8 V
2. Flash programming mode
This mode is provided for erasing or
programming the Flash EEPROM.
VDD = 2.7 to 3.6 V,
internal operating voltage VD1 = 2.5 V
The internal operating voltage VD1 must be
switched according to the mode as shown above
using the VDC register. Normally the VDC register
does not need to change from the default value "0"
(VD1 = 1.8 V). Also control of the VDC register is
unnecessary when the operating clock is switched.
The VDC register must be set to "1" only when
programming the Flash EEPROM.
Notes: Before the Flash EEPROM can be
programmed, a maximum 5 msec of wait
time is required for the internal operating
voltage to stabilize after switching the
operating mode. Also when returning the
IC to normal operation mode, be sure to
take this wait time before setting the VDC
register to "0".
Setting the VDC register to "1" increases
current consumption. Be sure to reset the
VDC register to "0" after Flash EEPROM
programming has finished.
5.4.7 Control of oscillation circuit and
operating mode
Table 5.4.7.1 shows the control bits for the oscilla-
tion circuit and operating mode.
SOSC3: 00FF02HD2
Controls the ON and OFF settings of the OSC3
oscillation circuit.
When "1" is written: OSC3 oscillation ON
When "0" is written: OSC3 oscillation OFF
Reading:
Valid
When the CPU and some peripheral circuits are to
be operated at high speed, SOSC3 is to be set to "1".
At all other times, it should be set to "0" in order to
reduce current consumption.
At initial reset, SOSC3 is set to "1" (OSC3 oscillation
ON).
CLKCHG: 00FF02HD3
Selects the operating clock for the CPU.
When "1" is written: OSC3 clock
When "0" is written: OSC1 clock
Reading:
Valid
When the operating clock for the CPU is switched
to OSC3, CLKCHG should be set to "1" and when
the clock is switched to OSC1, CLKCHG should be
set to "0".
At initial reset, CLKCHG is set to "1" (OSC3 clock).
VDC: 00FF02HD0
Selects a VD1 internal operating voltage value
(operating mode).
When "1" is written: 2.5 V
(Flash programming mode)
When "0" is written: 1.8 V
(Normal operation mode)
Reading:
Valid
Set VDC to "0" (VD1 = 1.8 V) for normal operation.
Before programming the Flash EEPROM, write "1"
to VDC to set the VD1 voltage to 2.5 V.
At initial reset, this register is set to "0" (normal
operation mode).
Table 5.4.7.1 Oscillation circuit and operating mode control bits
SR R/W
10
Address Bit
Name
Function
Comment
00FF02 D7
D6
D5
D4
D3
D2
D1
D0
–
CLKCHG
SOSC3
–
VDC
–
1
–
0
–
OSC3
On
–
VD1 = 2.5 V
–
OSC1
Off
–
VD1 = 1.8 V
–
CPU operating clock switch
OSC3 oscillation On/Off control
–
Operating mode selection
Constantly "0" when
being read
"0" when being read