參數(shù)資料
型號(hào): RTL8305SB
英文描述: RTL8305SB
中文描述: RTL8305SB
文件頁數(shù): 10/66頁
文件大小: 963K
代理商: RTL8305SB
RTL8305SB
2002/04/09
10
Rev.1.0
MTXEN/PRXDV
52
O
For MAC mode MII, this pin represents MTXEN, MII transmit enable.
For PHY mode MII, this pin represents PRXDV, MII received data valid.
For PHY mode SNI, this pin represents PRXDV, received data valid.
RTL8305SB = MTXEN/PRXDV, RTL8305S = MTXEN/MRXDV. In
order to differentiate between MAC and PHY mode, the RTL8305SB
changes the pin name for PHY mode.
For MAC mode MII, it is transmit clock, MTXC (acts as input).
For PHY mode MII/PHY mode SNI, it is receive clock, PRXC (acts as output).
Because this pin can be connected to a 2.5V or 3.3V device, this pin has
no internal pull-high resistor.
RTL8305SB = MTXC/PRXC, RTL8305S = MTXC/MRXC. In order to
differentiate between MAC and PHY mode, the RTL8305SB changes
the pin name for PHY mode.
Select Port 4 operating mode:
11: UTP / MAC mode MII 10: 100Base-FX mode
01: PHY mode MII 00: PHY mode SNI
The RTL8305SB has 4 options and the RTL8305S has 3 options.
Port4 Link Status for MAC:
When the PHY part of Port4 is not used,
this pin determines the link status of the Port4 MAC in real-time. That is
link status of real-time for MII MAC/MII PHY/SNI PHY only. This pin
is low active.
1: No Link.
0: Link
When P4MODE[1:0]=11 (UTP/MAC mode MII), this pin determines
the link status of MAC mode MII only in real time. The link status of
UTP mode is provided by the internal PHY in real time. If both UTP and
MII port are linked OK, UTP has higher priority.
When P4MODE[1:0]=10 (100Base-FX mode), this pin does nothing.
The internal PHY will provide the link status to the MAC in real time.
When P4MODE[1:0]=01 (PHY mode MII), this pin determines the link
status of Port4 in real time.
When P4MODE[1:0]=00 (PHY mode SNI), this pin determines the link
status of Port4 in real time.
This pin should be left floating in UTP or FX mode, and pulled down in
the other three modes.
In MAC mode MII/ PHY mode MII/ PHY mode SNI, configuration of
this pin will not set the link status of the internal register. The link status
depends on the external PHY or MAC.
1
MTXC/PRXC
51
I/O
P4MODE[1:0]
97,98
I
11
P4LNKSTA#
49
I
1
Cont…
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