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參數(shù)資料
| 型號： | RH80530NZ009256 |
| 英文描述： | MICROPROCESSOR|32-BIT|CMOS|PGA|478PIN|CERAMIC |
| 中文描述： | 微處理器| 32位|的CMOS |美巡賽| 478PIN |陶瓷 |
| 文件頁數(shù)： | 87/89頁 |
| 文件大?。?/td> | 1672K |
| 代理商： | RH80530NZ009256 |
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Mobile Intel
Pentium
III Processor-M Datasheet
298340-002
Datasheet
87
Appendix A. PLL RLC Filter Specification
A1.
Introduction
All Mobile Intel Pentium
III
Processor-Ms have internal PLL clock generators, which are analog in
nature and require quiet power supplies for minimum jitter. Jitter is detrimental to a system; it
degrades external I/O timings as well as internal core timings (i.e. maximum frequency). The PLL
RLC filter specifications for the Mobile Intel Pentium
III
Processor-M are the same as those for the
mobile Pentium
III
processor. The general desired topology is shown in Figure 2. Excluded from the
external circuitry are parasitics associated with each component.
A2.
Filter Specification
The function of the filter is two fold. It protects the PLL from external noise through low-pass
attenuation. It also protects the PLL from internal noise through high-pass filtering. In general, the
low-pass description forms an adequate description for the filter.
The AC low-pass specification, with input at V
CCT
and output measured across the capacitor, is as
follows:
< 0.2-dB gain in pass band
< 0.5-dB attenuation in pass band < 1 Hz (see DC drop in next set of requirements)
34-dB attenuation from 1 MHz to 66 MHz
28-dB attenuation from 66 MHz to core frequency
The filter specification (AC) is graphically shown in Figure 29.
Other requirements:
Use a shielded type inductor to minimize magnetic pickup
The filter should support a DC current of at least 30 mA
The DC voltage drop from V
CCT
to PLL1 should be less than 60 mV, which in practice implies
series resistance of less than 2
. This also means that the pass band (from DC to 1 Hz)
attenuation below 0.43 dB for V
CCT
= 1.25V.
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