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參數(shù)資料
| 型號： | RD28F6408W30T85 |
| 廠商： | INTEL CORP |
| 元件分類： | 存儲器 |
| 英文描述： | 1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30) |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA80 |
| 封裝： | 14 X 8 MM, 0.80 MM PITCH, STACK, CSP-80 |
| 文件頁數(shù)： | 38/82頁 |
| 文件大?。?/td> | 749K |
| 代理商： | RD28F6408W30T85 |
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28F6408W30, 28F3204W30, 28F320W30, 28F640W30
32
Preliminary
9.0
Flash Protection Register
The 1.8 Volt Intel
Wireless Flash Memory includes a 128-bit protection register. This protection
register can be used to increase system security and/or for identification purposes. The protection
register value can match the flash component to the system
’
s CPU or ASIC to prevent device
substitution.
The lower 64-bit segments within the protection register are programmed by Intel with a unique
number in each flash device. The upper 64-bit segments within the protection register are left for
the customer to program. Once programmed, the customer segment can be locked to prevent
further reprogramming.
The protection register shares some of the same internal flash resources as the parameter partition.
Therefore, read-while-write is only allowed between the protection register and main partitions.
Table 15
describes the operation allowed using read-while-write/erase with the protection register.
9.1
Protection Register Read
Writing the Read Identifier command allows the protection register data to be read 16 bits at a time
from addresses shown in
Table 11,
“
Device Identification Codes
”
on page 21
. The ID plane,
containing the protection registers, appears over partition addresses corresponding to the partition
address supplied with the command. Writing the Read Array command returns the device to read
array mode.
9.2
Program Protection Register
The Protection Program command should be issued only at the bottom partition followed by the
data to be programed at the specified location. It programs the 64-bit user protection register 16 bits
at a time.
Table 11,
“
Device Identification Codes
”
on page 21
and
Table 16,
“
Protection Register
Table 15. Simultaneous Operations Allowed with the Protection Register
Protection
Register
Parameter
Partition
Array Data
Main
Partition
Notes
Read
Conditional
–
See Notes
Write/Erase
While programming or erasing in a main partition, the protection register may
be read from any other partition. Reading the parameter partition data is not
allowed if the protection register is being read from addresses within the
parameter partition.
While programming or erasing in a main partition, read operations are allowed
in the parameter partition. Accessing the protection registers from parameter
partition addresses is not allowed.
While programming or erasing in a main partition, read operations are allowed
in the parameter partition. Accessing the protection registers in a partition that
is
different
from the one being programed/erased, and also
different
from the
parameter partition, is allowed.
While programming the protection register, reads are only allowed in the other
main partitions. Access to the parameter partition is not allowed. This is
because programming of the protection register can only occur in the
parameter partition, so it will exist in status mode.
While programming or erasing the parameter partition, reads of the protection
registers are not allowed in
any
partition. Reads in other main partitions are
supported.
Conditional
–
See Notes
Read
Write/Erase
Read
Read
Write/Erase
Write
No Access
Allowed
Read
No Access
Allowed
Write/Erase
Read
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