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參數(shù)資料
| 型號： | PDI1394L11 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 1394 AV Link Layer Controller(AV（音頻/視頻）鏈接層控制器) |
| 中文描述： | 1394影音鏈路層控制器（視聽（音頻/視頻）鏈接層控制器） |
| 文件頁數(shù)： | 4/46頁 |
| 文件大?。?/td> | 294K |
| 代理商： | PDI1394L11 |
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Philips Semiconductors
Product specification
PDI1394L11
1394 AV link layer controller
1997 Oct 21
4
8.0
APPLICATION DIAGRAM
MPEG OR DVC
DECODER
PDI1394L11
AV LINK
AV
INTERFACE
PDI1394P11
PHY
PHY–LINK
INTERFACE
HOST CONTROLLER
DATA 8/
ADDRESS 9/
INTERRUPT & CONTROL
1394 CABLE
INTERFACE
SV00268
9.0
PIN DESCRIPTION
9.1
Host Interface
PIN No.
14, 15, 16, 17,
18, 19, 20, 21, 22
1, 2, 3, 4, 7, 8, 9,
10
PIN SYMBOL
I/O
NAME AND FUNCTION
HIF A[8:0]
I
Host Interface Address 0 through 8. Provides the host with a byte wide interface to internal
registers. See description of Host Interface for addressing rules.
HIF D[7:0]
I/O
Host Interface Data 7 (MSB) through 0. Byte wide data path to internal registers.
26
HIF WR_N
I
Write enable. When asserted (LOW) in conjunction with HIF CS_N, a write to the PDI1394L11
internal registers is requested. (NOTE: HIF WR_N and HIF RD_N : if these are both LOW in
conjunction with HIF CS_N, then a write cycle takes place. This can be used to connect
CPUs that use R/W_N line rather than separate RD_N and WR_N lines. In that case, connect
the R/W_N line to the HIF WR_N and tie HIF RD_N LOW.)
Read enable. When asserted (LOW) in conjunction with HIF CS_N, a read of the PDI1394L11
internal registers is requested.
Chip Select (active LOW). Host bus control signal to enable access to the FIFO and control
and status registers.
Interrupt (active LOW). Indicates a interrupt internal to the PDI1394L11. Read the General
Interrupt Register for more information. This pin is open drained and requires a 1K pullup
resistor.
Reset (active LOW). The asynchronous master reset to the PDI1394L11.
27
HIF RD_N
I
25
HIF CS_N
I
28
HIF INT_N
O
29
RESET_N
I
6, 13, 24, 32, 39,
45, 49, 64, 72, 78
5, 12, 23, 31, 38,
44, 50, 63, 73, 79
V
DD
3.3V
±
0.3V power supply
GND
Ground reference
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| PDI1394L21 | Full Duplex AV Link Layer Ccontroller(全雙工AV鏈接層控制器) |
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| PDI1394P21 | 3-port Physical Layer Interface(三端口物理層接口) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDI1394L11BA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 AV link layer controller |
| PDI1394L11BA-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:IEEE 1394 (Firewire) Bus Interface/Controller |
| PDI1394L21 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 full duplex AV link layer controller |
| PDI1394L21BE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 full duplex AV link layer controller |
| PDI1394L21BP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 full duplex AV link layer controller |
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