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參數(shù)資料
| 型號： | MT92101 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | IP Phone Processor(IP電話處理器（提供一個用于企業(yè)IP電話的解決方案）) |
| 中文描述： | IP電話處理器（的IP電話處理器（提供一個用于企業(yè)的IP電話的解決方案）） |
| 文件頁數(shù)： | 1/18頁 |
| 文件大?。?/td> | 174K |
| 代理商： | MT92101 |
1
Features
Low Voltage Operation, 1.65 to 1.95 Volts
Standard 3.3 Volt Signal Interfaces
On-chip RISC CPU and Powerful DSP
Standard Integrated System Interfaces
Embedded Physical Layer Firmware
G.729.AB and G.723.1A Vocoders, including
VAD and CNG*
Group 3 Fax Relay, 2400 – 14400 bps
H.323, MGCP, or SIP Protocol Software
Available
JTAG Port for Debug and Boundary Scan
Applications
Voice over IP Enterprise Telephones and
Related Equipment
* subject to patent indemnification
Description
The MT92101 IP Phone Processor provides a highly
integrated solution for an IP phone for use in
enterprise applications. The IP Phone Processor
integrates
an
ARM-Thumb
supporting subsystem including dual Ethernet MAC
and bridge, together with an OAKDSPCore
TM
, full
RAM and ROM and a supporting subsystem.
Firmware is embedded to allow the implementation
of multi-channel voice compression, echo cancel-
lation and supporting functions on the DSP.
RISC
CPU
and
Figure 1 - Functional Block Diagram
6
8
3
5
3
2
32
8
2
6
3
3
5
18
MII
16
MII
3
G
5
5
D
2
USB
PKM
UART
SSIO
INT
DMA
GP TIM
GIO
KEYPD
WATCH
TDM Master
B
μ
ILD
JTAG TEST + DEBUG
JTAG
THUMB
CPU
DES
B
O
O
T
MEMORY
INTERFACE
802.1/p/d/Q
BRIDGE
nRESET
OAK
DSP
ICEBREAKER
OCEM
SELECT ENABLE
EXTMAST
C
3
V
D
T
J
4
T
TDM
AUDIO
AEC
DMA
INT
C-bus
INTERFACE
RAM
7k Data
4k Prog
ROM
8k Data
60k Prog
10/100 MAC
10/100 MAC
PLL
1
A
EXTERNAL
MEMORY
INTERFACE
Ordering Information
MT92101A/PR/BP1R 288 Ball PBGA
MT92101A/PR/GP1R 208 Pin QFP
-40
°
C to +85
°
C
DS5251
ISSUE 1
February 2000
MT92101
IP Phone Processor
Preliminary Information
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