參數(shù)資料
型號: MT90871AV
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 路由/交換
英文描述: Flexible 8K Digital Switch (F8KDX)
中文描述: TELECOM, DIGITAL TIME SWITCH, PBGA196
封裝: 15 X 15 MM, 1 MM PITCH, LBGA-196
文件頁數(shù): 30/65頁
文件大?。?/td> 639K
代理商: MT90871AV
MT90871
Data Sheet
30
Zarlink Semiconductor Inc.
register or data register are serially shifted out towards the TDo. The data out of the TDo is clocked on the
falling edge of the TCK pulses. When no data is shifted through the boundary scan cells, the TDo output is
set to a high impedance state.
Test Reset (TRST)
TRST
provides an asynchronous Reset to the JTAG scan structure. This pin is internally pulled to V
DD_IO
when not driven from an external source. This pin must be held LOW for normal (non-JTAG) device
operation.
11.2
TAP Registers
The MT90871 uses the public instructions defined in the IEEE 1149.1 standard with the provision of an
Instruction Register and three Test Data Registers.
11.2.1
Test Instruction Register
The JTAG interface contains a four-bit instruction register. Instructions are serially loaded into the Instruction
Register from the
TDi
pin when the TAP Controller is in the shift-IR state. Instructions are subsequently
decoded to achieve two basic functions: to select the Test Data Register to operate while the instruction is
current, and to define the serial Test Data Register path to shift data between
TDi
and
TDo
during data register
scanning.
11.2.2
Test Data Registers
11.2.2.1
The Boundary-Scan Register
The Boundary-Scan register consists of a series of Boundary-Scan cells arranged to form a scan path around
the boundary of the MT90871 core logic.
11.2.2.2
The Bypass Register
The Bypass register is a single stage shift register to provide a one-bit path from
TDi
to
TDo
.
11.2.2.3 The Device Identification Register
The JTAG device ID for the MT90871 is 0087114B
H
.
11.3
Boundary Scan Description Language (BSDL) File
A Boundary Scan Description Language (BSDL) file is available from Zarlink Semiconductor to aid in the use of
the IEEE 1149.1 test interface.
Version, Bits <31:28>:
Part No., Bits <27:12>:
Manufacturer ID, Bits <11:1>:
Header, Bit <0> (LSB):
0000
0000 1000 0111 0001
0001 0100 101
1
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