參數(shù)資料
型號： MPC7410VS500LE
廠商： Freescale Semiconductor
文件頁數(shù)： 56/56頁
文件大?。?/td> 0K
描述： IC MPU PPC 500MHZ 360-FCCLGA
標準包裝： 44
系列： MPC74xx
處理器類型： 32-位 MPC74xx PowerPC
速度： 500MHz
電壓： 1.8V
安裝類型： 表面貼裝
封裝/外殼： 360-CLGA，F(xiàn)CCLGA
供應(yīng)商設(shè)備封裝： 360-FCCLGA（25x25）
包裝： 托盤
MPC7410 RISC Microprocessor Hardware Specifications, Rev. 6.1
Freescale Semiconductor
9
Electrical and Thermal Characteristics
Table 3 provides the recommended operating conditions for the MPC7410.
Table 2. Input Threshold Voltage Setting
BVSEL Signal 3
Processor Bus Input
Threshold is Relative to:
L2VSEL Signal 3
L2 Bus Input Threshold is
Relative to:
Notes
0
1.8 V
0
1.8 V
1
HRESET
2.5 V
HRESET
2.5 V
1, 2
1
3.3 V
1
2.5 V
1, 4, 5
HRESET
3.3 V
HRESET
Not Supported
6
Notes:
1. Caution: The input threshold selection must agree with the OVDD/L2OVDD voltages supplied.
2. To select the 2.5-V threshold option, BVSEL and/or L2VSEL should be tied to HRESET so that the two signals
change state together. This is the preferred method for selecting this mode of operation.
3. To overcome the internal pull-up resistance, a pull-down resistance less than 250
Ω should be used.
4. Default voltage setting if left unconnected (internal pulled-up). MPC7410RX
nnnLE (Rev 1.4) and later only.
Previous revisions do not support 3.3 V OVDD; the default voltage setting if left unconnected is 2.5 V.
5. M
xx7410xxnnnLE (Rev. 1.4) and later only. Previous revisions do not support 3.3 V OVDD; having BVSEL = 1 selects
the 2.5-V threshold.
6. M
xx7410xxnnnLE (Rev. 1.4) and later only. Previous revisions do not support BVSEL = HRESET. (HRESET is
the inverse of HRESET.)
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