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參數(shù)資料
| 型號(hào)： | MCZ33797EKR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 9/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SQUIB DRIVER 2CHAN 32-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | * |
| 應(yīng)用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 32-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 32-SOIC |
| 包裝： | 帶卷 (TR) |
| 安裝類型： | 表面貼裝 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
17
33797
FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The Four Channel Squib Driver IC is a complete squib
diagnostic and deployment interface for use in automotive air
bag modules. Extensive diagnostics and system control
features are incorporated to provide fail-safe operation.
The device contains a serial peripheral interface (SPI)
compatible 8-bit interface for microprocessor control. This
interface allows the microprocessor to set up and read back
the results of all internal diagnostic functions. Squib
resistance level, along with possible shorts-to-battery or
ground, open ground connections, or shorts between squib
firing loops, are included in the diagnostic set. Additionally,
the squib supply voltage levels can be checked and the low
side fire return can be checked for an open condition (open
ground connection). The SPI interface, along with the
additional FEN pin, is used to arm and fire a selected squib.
The device has the capability to be used in a standard four-
channel squib driver IC or in a cross-coupled state with the
high and low side squib drivers located on separate squib
driver ICs.
Both the high side and low side output drivers are protected
against temporary shorts to battery or ground. The current
limit threshold is set by an external resistor.
FUNCTIONAL PIN DESCRIPTION
INTRODUCTION
In this section references are made to XX; e.g., in
SENSE_XX, SQB_LO_XX, and SQB_LO_XX_CONT. In
these and similar instances, XX denotes 1A, 1B, 2A, and 2B.
SERIAL CLOCK (SCLK)
Serial clock input for SPI interface. Data on the D1 pin is
clocked into the device on the rising edge. Data is clocked out
of the device via the D0 pin on the falling edge. Default state
is low with no connection.
CHIP SELECT (CS)
Chip select for SPI interface. Active low. On rising edge, data
shifted into the shift register is internally latched. On falling
edge, diagnostic results are latched into shift register. Default
state is high with no connection.
MASTEROUT/SLAVE IN (MOSI)
Serial data input to 33797 SPI interface. Default state is low
with no connection.
MASTER IN/SLAVE OUT (MISO)
Serial data output from 33797 SPI interface.
FET DRIVER 1A AND 1B (FEN_1)
Active high input signal to enable operation of squibs 1A and
1B FET drivers. All diagnostic functions are available while
pin is low. Default state is low with no connection.
FET DRIVER 2A AND 2B (FEN_2)
Active high input signal to enable operation of squibs 2A and
2B FET drivers. All diagnostic functions are available while
pin is low. Default state is low with no connection.
DEVICE GROUND (GND)
Device ground pin for internal logic and diagnostic circuitry.
DEVICE POWER (VDD)
Device power pin for internal logic and diagnostic circuitry.
RESET (RST)
Reset Bar. Active low. With low input signal the internal
functions of the squib driver IC are disabled and all data in the
serial interface shift registers is cleared. Default state is low
with no connection.
LIMIT RESISTOR - DIAGNOSTIC (R_DIAG)
External resistor to ground is used to set the diagnostic
current for squib resistance.
LIMIT RESISTOR 1A AND 1B (R_LIMIT_1)
External resistor to ground is used to set current limit for
squibs 1A and 1B FET drivers.
LIMIT RESISTOR 2A AND 2B (R_LIMIT_2)
External resistor to ground is used to set current limit for
squibs 2A and 2B FET drivers.
SQUIB DIAGNOSTIC 1A AND 1B (VDIAG_1)
Diagnostic pins for the high side safing sensors for squibs 1A
and 1B, as well as the VFIRE supply voltage.
SQUIB DIAGNOSTIC 2A AND 2B (VDIAG_2)
Diagnostic pins for the high side safing sensors for squibs 2A
and 2B, as well as the VFIRE supply voltage.
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