參數(shù)資料
型號(hào)： M37736EHBGS
廠商： Mitsubishi Electric Corporation
英文描述： PROM VERSION OF M37736EHBXXXGP
中文描述： PROM的版本M37736EHBXXXGP
文件頁(yè)數(shù)： 59/96頁(yè)
文件大小： 1328K
代理商： M37736EHBGS
59
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MITSUBISHI MICROCOMPUTERS
M37736MHBXXXGP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Oscillation circuit control register 0
X
drivability selection bit
0 : LOW
1 : HIGH
Main clock stop bit
0 : Main-clock oscillation is available.
1 : Main-clock oscillation is stopped.
System clock selection bit
Port-X
C
selection bit = “0” (Sub clock is not used.)
0 : Main clock is selected.
1 : Main clock divided by 8 is selected.
Port-X
selection bit = “1” (Sub clock is used.)
0 : Main clock is selected.
1 : Sub clock is selected.
Port-Xc selection bit
0 : Ports P7
7
and P7
6
are selected. (Sub clock is not used.)
1 : Pins X
CIN
and X
COUT
are selected. (Sub clock is used.)
System clock stop bit at wait state
0 : Clocks f
2
to f
512
are operating at WIT state
1 : Clocks f
2
to f
512
stop at WIT state
Signal output disable selection bit (Refer to Table 7.)
Address
6C
16
Note.
Write to the oscillation circuit control
register 1 as the flow shown in Figure 65.
CM
6
CM
5
CM
4
CM
3
CM
2
CM
0
7
6
5
4
3
2
1
0
Oscillation circuit control register 1
Main clock division selection bit
0 : Main clock is divided by 2.
1 : Main clock is not divided by 2.
Main clock external input selection bit
0 : Main-clock oscillation circuit is operating by itself.
Watchdog timer is used at returning from STP state.
1 : Main-clock is input externally.
Watchdog timer is not used at returning from STP state.
Sub clock external input selection bit
0 : Sub-clock oscillation circuit is operating by itself.
Port P7
functions as X
pin.
Watchdog timer is used at returning from STP state.
1 : Sub-clock is input externally.
Port P7
6
functions as I/O port.
Watchdog timer is not used ar returning from STP state.
X : Not used
0 : Always “0” (However, writing data “55
16
” shown in Figure 65 is possible.)
Clock prescaler reset bit
Address
6F
16
CC
0
CC
1
CC
2
0
7
6
5
4
3
2
1
0
Fig. 64 Bit configuration of oscillation circuit control registers 0, 1
Fig. 65 How to write data in oscillation circuit control register 1
Writing data “80
16
” (LDM instruction)
Reset clock prescaler
Writing data “55
16
” (LDM instruction)
Writing data “0Y
16
” (LDM instruction)
CC
2
to CC
0
selection bits
How to reset clock prescaler
How to write in CC
2
to CC
0
selection bits
Note.
“Y” is the sum of bits to be set. For example,
when
setting bits 2 and 1 to “1”, “Y” becomes “6”.
Next instruction
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