![](http://datasheet.mmic.net.cn/280000/M37736MHB_datasheet_16084045/M37736MHB_22.png)
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MITSUBISHI MICROCOMPUTERS
M37736MHBXXXGP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
22
(3) One-shot pulse mode [10]
Figure 22 shows the bit configuration of the timer Ai mode resister
during the one-shot pulse mode. In the one-shot pulse mode, bit 0
and bit 5 must be “0” and bit 1 and bit 2 must be “1”.
The trigger is enabled when the count start flag is “1”. The trigger
can be generated by software, or it can be input from the TAi
IN
pin.
Software trigger is selected when bit 4 is “0”, and the input signal
from the TAi
IN
pin is used as the trigger when bit 4 is “1”.
Bit 3 is used to determine whether to trigger at the fall of the trigger
signal or at the rise. The trigger is at the fall of the trigger signal when
bit 3 is “0” and at the rise of the trigger signal when bit 3 is “1”.
Software trigger is generated by setting the bit of the one-shot start
flag corresponding to each timer.
Figure 23 shows the bit configuration of the one-shot start flag.
As shown in Figure 24, when a trigger signal is received, the counter
counts the clock selected by bits 6 and 7.
If the contents of the counter is not 0000
16
, the TAi
OUT
pin goes “H”
when a trigger signal is received. The count direction is decrement.
When the counter reaches 0001
16
, the TAi
OUT
pin goes “L” and count
is stopped. The contents of the reload register is transferred to the
counter. At the same time, an interrupt request signal is generated,
and the interrupt request bit of the timer Ai interrupt control register is
set. This is repeated each time a trigger signal is received. The output
pulse width is
1
pulse frequency of the selected clock
(counter’s value at the time of trigger).
If the count start flag is “0”, the level of the TAi
OUT
pin goes “L”.
Therefore, the counter’s value corresponding to the desired pulse
width must be written to timer Ai before setting “1” to the timer Ai
count start flag.
As shown in Figure 25, a trigger signal can be received before the
operation for the previous trigger signal is completed. In this case,
the contents of the reload register is transferred to the counter by the
trigger, and then that value is decremented.
Except when retriggering while operating, the contents of the reload
register is not transferred to the counter by triggering.
When retriggering, there must be at least two timer count source
cycles before a new trigger can be issued.
Fig. 22 Timer Ai mode register bit configuration during one-shot
pulse mode
Timer A0 mode register 56
16
Timer A1 mode register 57
16
Timer A2 mode register 58
16
Timer A3 mode register 59
16
Timer A4 mode register 5A
16
Addresses
1 : Always “1” in one-shot pulse
mode
0
: Software trigger
1
0 : Trigger at the falling edge of
TAi
IN
input
1 1 : Trigger at the rising edge of
TAi
input
0 : Always “0” in one-shot pulse
mode
Clock source selection
0 0 : Select f
2
0 1 : Select f
16
1 0 : Select f
64
1 1 : Select f
512
1 0 : Always “10” in
one-shot
pulse mode
7 6
5 4
3
2 1
0
0
1
0
1