參數(shù)資料
型號(hào)： M-ORT82G52BM680-DB
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： FPGA
英文描述： FPGA, 1296 CLBS, 333000 GATES, PBGA680
封裝： PLASTIC, FBGA-680
文件頁(yè)數(shù)： 92/94頁(yè)
文件大?。?/td> 2104K
代理商： M-ORT82G52BM680-DB
Lattice Semiconductor
ORCA ORT82G5 Data Sheet
92
Package Parasitics
The electrical performance of an IC package, such as signal quality and noise sensitivity, is directly affected by the
package parasitics. Table 35 lists eight parasitics associated with the ORCA packages. These parasitics represent
the contributions of all components of a package, which include the bond wires, all internal package routing, and
the external leads.
Four inductances in nH are listed: LSW and LSL, the self-inductance of the lead; and LMW and LML, the mutual
inductance to the nearest neighbor lead. These parameters are important in determining ground bounce noise and
inductive crosstalk noise. Three capacitances in pF are listed: CM, the mutual capacitance of the lead to the near-
est neighbor lead; and C1 and C2, the total capacitance of the lead to all other leads (all other leads are assumed
to be grounded). These parameters are important in determining capacitive crosstalk and the capacitive loading
effect of the lead. Resistance values are in m.
The parasitic values in Table 35 are for the circuit model of bond wire and package lead parasitics. If the mutual
capacitance value is not used in the designer’s model, then the value listed as mutual capacitance should be
added to each of the C1 and C2 capacitors.
Table 35. ORCA ORT82G5 Package Parasitics
Figure 33. Package Parasitics
Terms and Denitions
Basic Size (BSC): The basic size of a dimension is the size from which the limits for that dimension are derived by
the application of the allowance and the tolerance.
Design Size: The design size of a dimension is the actual size of the design, including an allowance for t and tol-
erance.
Typical (TYP): When specied after a dimension, this indicates the repeated design size if a tolerance is specied
or repeated basic size if a tolerance is not specied.
Reference (REF): The reference dimension is an untoleranced dimension used for informational purposes only. It
is a repeated dimension or one that can be derived from other values in the drawing.
Minimum (MIN) or Maximum (MAX): Indicates the minimum or maximum allowable size of a dimension.
Package Type
LSW
LMW
RW
C1
C2
CM
LSL
LML
680-Pin PBGAM
3.8
1.3
250
1.0
0.3
2.8-5
0.5 -1
PAD N
Board Pads
CM
C1
LSW
RW
LSL
LMW
C2
C1
LML
C2
PAD N + 1
LSW
RW
LSL
Circuit
Pad N+1
Pad N
Package
Pads
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