參數(shù)資料
型號(hào)： LSM303DLHTR
廠商： STMICROELECTRONICS
元件分類： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PBGA28
封裝： 5 X 5 MM, 1 MM HEIGHT, ROHS COMPLIANT, PLASTIC, LGA-16
文件頁(yè)數(shù)： 14/47頁(yè)
文件大?。?/td> 585K
代理商： LSM303DLHTR
LSM303DLH
Application hints
Doc ID 16941 Rev 1
21/47
6.1
External capacitors
The C1 and C2 external capacitors should have a low SR value ceramic type construction.
Reservoir capacitor C1 is nominally 4.7 F in capacitance, with the set/reset capacitor C2
nominally 0.22 F in capacitance.
The device core is supplied through the Vdd line. Power supply decoupling capacitors
(C4=100
nF ceramic, C3=10 F Al) should be placed as near as possible to the supply pin
of the device (common design practice). All the voltage and ground supplies must be
present at the same time to obtain proper behavior of the IC (refer to
The functionality of the device and the measured acceleration/magnetic field data is
selectable and accessible through the I2C interface.
The functions, the threshold and the timing of the two interrupt pins (INT 1 and INT 2) can be
completely programmed by the user through the I2C interface.
6.2
Pull-up resistors
Pull-up resistors are placed on the two I2C bus lines.
6.3
Digital interface power supply
This digital interface dedicated to the linear acceleration signal is capable of operating with a
standard power supply (Vdd) or using a dedicated power supply (Vdd_IO_A).
This digital interface dedicated to the magnetic field signal requires a dedicated power
supply (Vdd_dig_M).
The table below shows the modes available in the various power supply conditions.
6.4
Soldering information
The LGA package is compliant with the ECOPACK, RoHS and “Green” standard.
It is qualified for soldering heat resistance according to JEDEC J-STD-020.
Leave “pin 1 Indicator” unconnected during soldering.
Land pattern and soldering recommendations are available at www.st.com/
Table 8.
Operational mode and power supply for magnetic field sensing
Vdd_dig_M
Vdd
Mode
supported
Description
High
All
except off
Digital I/O pins: range from GND to Vdd_I2C_bus /
Vdd_dig_M.
Device fully functional. Digital logic blocks are powered
from Vdd_dig_M supply, including all onboard clocks.
High
Low
Power down
Digital I/O pins: range from GND to Vdd_I2C_bus /
Vdd_dig_M.
Device measurement functionality not supported.
Device I2C bus and register access supported.
相關(guān)PDF資料
PDF描述
LSM330DL SPECIALTY ANALOG CIRCUIT, PBGA28
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