參數(shù)資料
型號: LH79520N0Q000B1
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: System-on-Chip
封裝: LH79520N0Q000B1<SOT1017-1 (LQFP176)|<<http://www.nxp.com/packages/SOT1017-1.html<1<Always Pb-free,;
文件頁數(shù): 29/59頁
文件大?。?/td> 666K
代理商: LH79520N0Q000B1
System-on-Chip
LH79520
Preliminary data sheet
Rev. 01
16 July 2007
29
NXP Semiconductors
AC Specifications (Industrial)
Table 11. AC Signal Characteristics (Industrial)
SIGNAL
TYPE LOAD DRIVE
SYMBOL
MIN.
MAX.
DESCRIPTION
ASYNCHRONOUS MEMORY INTERFACE SIGNALS
D[31:0]
Output 50 pF
8 mA
tOVD
tHCLK + 6.5 ns
Data Output Valid, following
Address Valid
Data Output Invalid, following
Address Valid
tOHD
3 × tHCLK – 6 ns
Input
tIDD
2 × tHCLK – 18 nsAddress Valid (1 WAIT state)
2 × tHCLK – 18 ns
+ (nWAIT –1)
× tHCLK
Data Input Valid, following
Address Valid (nWAIT states)
nCS6 - nCS0 Output 30 pF
8 mA
tOVCS
tHCLK + 6 ns
Chip Select Output Valid,
following Address Valid
Chip Select Output Invalid,
following Address Valid
Byte Lane Enable Valid,
following Address Valid
Byte Lane Enable Invalid, follow-
ing Address Valid; Write Cycle
Byte Lane Enable Invalid, follow-
ing Address Valid; Read Cycle
Write Enable Valid, following
Address Valid
Write Enable Invalid, following
Address Valid
Ouput Enable Valid, following
Address Valid
Ouput Enable Invalid, following
Address Valid
tOHCS
3 × tHCLK – 6 ns
nBLE[3:0]
Output 30 pF
8 mA
tOVBE
tHCLK + 10 ns
tOHBEW
2 × tHCLK – 6 ns
tOHBER
3 × tHCLK – 6 ns
nWE
Output 30 pF
8 mA
tOVWE
tHCLK + 10 ns
tOHWE
2 × tHCLK – 6 ns 2 × tHCLK - 6 ns
nOE
Output 30 pF
8 mA
tOVOE
tHCLK + 10 ns
tOHOE
3 × tHCLK – 6 ns
nWAIT
Input
tISWAIT
2 × tHCLK – 18 nsAddress Valid
SYNCHRONOUS MEMORY INTERFACE SIGNALS
8 mA
tOVA
tOVD
tOHD
1.2 ns
tISD
tIDD
1.5 ns
tOVCA
tOHCA
tOVRA
tOHRA
tOVSDW
tOHSDW
tOVC0
tOHC0
tOVDQ
tOHDQ
A[25:0]
Ouput
50 pF
10.5 ns
11.5 ns
Address Valid
Output Data Valid
Output Data Hold
Input Data Setup
Input Data Hold
CAS Valid
CAS Hold
RAS Valid
RAS Hold
SDWE Write Enable Valid
SDWE Write Enable Hold
SDCKE Clock Enable Valid
SDCKE Clock Enable Hold
DQM Data Mask Valid
DQM Data Mask Hold
D[31:0]
Output 50 pF
8 mA
Input
5 ns
nCAS
Output 50 pF
8 mA
11 ns
2 ns
nRAS
Output 50 pF
8 mA
11 ns
2 ns
nSDWE
Output 30 pF
8 mA
11 ns
2 ns
SDCKE
Output 30 pF
8 mA
11 ns
2 ns
DQM[3:0]
Output 30 pF
8 mA
11 ns
2 ns
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