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參數資料
| 型號： | LH75401N0Q100C0 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數學處理器 |
| 英文描述： | System-on-Chip |
| 封裝： | LH75401N0Q100C0<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.html<1<Always Pb-free,;LH75411N0Q100C0<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1 |
| 文件頁數： | 24/63頁 |
| 文件大?。?/td> | 665K |
| 代理商： | LH75401N0Q100C0 |
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LH75401/LH75411
System-on-Chip
24
Rev. 01
—
16 July 2007
Preliminary data sheet
NXP Semiconductors
FUNCTIONAL OVERVIEW
ARM7TDMI-S Processor
The LH75401/LH75411 microcontrollers feature the
ARM7TDMI-S core with an Advanced High-Performance
Bus (AHB) 2.0 interface. The ARM7TDMI-S is a 16/32-bit
embedded RISC processor and a member of the ARM7
Thumb family of processors. For more information, visit
the ARM Web site at www.arm.com.
Bus Architecture
The LH75401/LH75411 microcontrollers use the
ARM Advanced Microcontroller Bus Architecture (AMBA)
2.0 internal bus protocol. Three AHB masters control
access to external memory and on-chip peripherals:
The ARM processor fetches instructions and trans-
fers data
The Direct Memory Access Controller (DMAC) trans-
fers from memory to memory, from peripheral to
memory, and from memory to peripheral
The LCDC refreshes an LCD panel with data from
the external memory or from internal memory if the
frame buffer is 16 kB or less.
The ARM7TDMI-S processor is the default bus mas-
ter. An Advanced Peripheral Bus (APB) bridge is pro-
vided to access to the various APB peripherals.
Generally, APB peripherals are serviced by the ARM
core. However, if they are DMA-enabled, they are also
serviced by the DMAC to increase system performance
while the ARM core runs from local internal memory.
Power Supplies
Five-Volt-tolerant 3.3 V I/Os are employed. The
LH75401/LH75411 microcontrollers require a single
3.3 V supply. The core logic requires 1.8 V, supplied by
an on-chip linear regulator. Core logic power may also
be supplied externally to achieve higher system
speeds. See the Electrical Specifications.
Clock Sources
The LH75401/LH75411 microcontrollers may use
two crystal oscillators, or an externally supplied clock.
There are two clock trees:
One clock tree drives an internal Phase Lock Loop
(PLL) and the three UARTs. It supports a crystal
oscillator frequency range from 14 MHz to 20 MHz.
The other is a 32.768 kHz oscillator that generates a
1 Hz clock for the RTC. (Use of the 32.768 kHz crys-
tal for the Real Time Clock is optional. If not using the
crystal, tie XTAL32IN to VSS and allow XTAL32OUT
to float.)
The 14-to-20 MHz crystal oscillator drives the UART
clocks, so an oscillator frequency of 14.7456 MHz is rec-
ommended to achieve modem baud rates.
The PLL may be bypassed and an external clock
supplied at XTALIN; the SoC will operate to DC with the
PLL disabled. When doing so, allow XTALOUT to float.
The input clock with the PLL bypassed will be twice the
desired system operating frequency, and care must be
taken not to exceed the maximum input clock voltage.
Maximum values for system speeds and input voltages
are given in the Electrical Specifications.
Figure 4. LH75401 System Application Example
STN/TFT,
LCD
TOUCH SCREEN
GPIO
SSP
A/D
KEY
MATRIX
SERIAL
EEPROM
CAN
2.0B
CAN
NETWORK
A/D
FLASH
SRAM
BOOT
ROM
UART
LH75401
CAN
TRANSCEIVER
SENSOR
ARRAY
LH754xx-2A
1
2
3
4
5
6
7
8
9
*
0
#
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LH75401N0Q100C0,55 | 功能描述:ARM微控制器 - MCU ARM7 CAN LCD ADC RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數據總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數據 RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| LH75401N0Q100C055 | 制造商:NXP Semiconductors 功能描述:MCU ARM7 BLUESTREAK 144LQFP |
| LH75401N0Q100C055 | 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 84MHZ LQFP-144 |
| LH75401N0Q100C0551 | 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
| LH75401N0Q100C0-S | 制造商:NXP Semiconductors 功能描述:SOC Microcontroller 1.98V 144-Pin LQFP Tray |
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