參數(shù)資料
型號： LFXP15C-4FN256C
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： FPGA
中文描述： FPGA, 1932 CLBS, PBGA256
封裝： 17 X 17 MM, LEAD FREE, FPBGA-256
文件頁數(shù)： 50/130頁
文件大小： 1312K
代理商： LFXP15C-4FN256C
2-23
Architecture
Lattice Semiconductor
LatticeXP Family Data Sheet
Figure 2-28. LatticeXP Banks
LatticeXP devices contain two types of sysIO buffer pairs.
1.
Top and Bottom sysIO Buffer Pair (Single-Ended Outputs Only)
The sysIO buffer pairs in the top and bottom banks of the device consist of two single-ended output drivers and
two sets of single-ended input buffers (both ratioed and referenced). The referenced input buffer can also be
configured as a differential input.
The two pads in the pair are described as “true” and “comp”, where the true pad is associated with the positive
side of the differential input buffer and the comp (complementary) pad is associated with the negative side of
the differential input buffer.
Only the I/Os on the top and bottom banks have PCI clamps. Note that the PCI clamp is enabled after VCC,
VCCAUX and VCCIO are at valid operating levels and the device has been configured.
2.
Left and Right sysIO Buffer Pair (Differential and Single-Ended Outputs)
The sysIO buffer pairs in the left and right banks of the device consist of two single-ended output drivers, two
sets of single-ended input buffers (both ratioed and referenced) and one differential output driver. The refer-
enced input buffer can also be configured as a differential input. In these banks the two pads in the pair are
described as “true” and “comp”, where the true pad is associated with the positive side of the differential I/O,
and the comp (complementary) pad is associated with the negative side of the differential I/O.
Select I/Os in the left and right banks have LVDS differential output drivers. Refer to the Logic Signal Connec-
tions tables for more information.
V
REF1(2)
GND
Bank
2
V
CCIO2
V
REF2(2)
V
REF1(3)
GND
Bank
3
V
CCIO3
V
REF2(3)
V
REF1(7)
GND
Bank
7
V
CCIO7
V
REF2(7)
V
REF1(6)
GND
Note: N and M are the maximum number of I/Os per bank.
Bank
6
V
CCIO6
V
REF2(6)
V
REF1(5)
GND
Bank 5
V
CCIO5
V
REF2(5)
V
REF1(4)
GND
Bank 4
V
CCIO4
V
REF2(4)
V
REF1(
0)
GND
Bank 0
V
CCIO0
V
REF2(
0)
V
REF1(1)
GND
Bank 1
V
CCIO1
V
REF2(1)
1
M
1
M
1
M
1
M
1N
相關PDF資料
PDF描述
LFZ3508VXX GENERAL PURPOSE INDUCTOR
LFZ2805HXX GENERAL PURPOSE INDUCTOR
LF02004VTX GENERAL PURPOSE INDUCTOR
LG3341-NE7501 T-1 SINGLE COLOR LED, GREEN, 3 mm
LG3341-KNE9117 T-1 SINGLE COLOR LED, GREEN, 3 mm
相關代理商/技術參數(shù)
參數(shù)描述
LFXP15C-4FN256I 功能描述:FPGA - 現(xiàn)場可編程門陣列 15.4K LUTs 188 IO 1. 8/2.5/3.3V-4 Spd I RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
LFXP15C-4FN388C 功能描述:FPGA - 現(xiàn)場可編程門陣列 15.4K LUTs 268 IO 1. 8/2.5/3.3V -4 Spd RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
LFXP15C-4FN388I 功能描述:FPGA - 現(xiàn)場可編程門陣列 15.4K LUTs 268 IO 1. 8/2.5/3.3V-4 Spd I RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
LFXP15C-4FN484C 功能描述:FPGA - 現(xiàn)場可編程門陣列 15.4K LUTs 1.8/2.5/3 .3V -4 Spd RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
LFXP15C-4FN484I 功能描述:FPGA - 現(xiàn)場可編程門陣列 15.4K LUTs 1.8/2.5/3 .3V-4 Spd I RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*