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Continued from preceding page.
No. 5117-28/39
LC6529N, LC6529F, LC6529L
Instruction code
Affected
status
bits
Mnemonic
Operation
Description
Note
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
[Branch instructions]
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if [M (DP, t
1
t
0
)]
= 0
The mnemonic
includes decimal
equivalent t of
immediate data
i.e., BNM0 to
BNM3.
Branch to specified address
in same page (P
7
to P
0
) if bit
specified by immediate data
t
1
t
0
in M (DP) is zero.
BNMt
addr
Branch on no M bit
0 0 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
0 1 t
1
t
0
2
2
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if [P (DP
L
, t
1
t
0
)]
= 1
Branch to specified address
in same page (P
7
to P
0
) if bit
specified by immediate data
t
1
t
0
in P (DP
L
) is one.
The mnemonic
includes decimal
equivalent t of
immediate data
i.e., BP0 to BP3.
BPt
addr
0 1 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
1 0 t
1
t
0
Branch on port bit
2
2
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if [P (DP
L
, t
1
t
0
)]
= 0
The mnemonic
includes decimal
equivalent t of
immediate data
i.e., BNP0 to
BNP3.
Branch to specified address
in same page (P
7
to P
0
) if bit
specified by immediate data
t
1
t
0
in P (DP
L
) is zero.
BNPt
addr
Branch on no port bit
0 0 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
1 0 t
1
t
0
2
2
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if TMF = 1
then TMF
←
0
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if TMF = 0
then TMF
←
0
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if CF = 1
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if CF = 0
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if ZF = 1
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if ZF = 0
Branch to specified address
in same page (P
7
to P
0
)
if TMF is one. Clear TMF
to zero.
BTM
addr
0 1 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
1 1 0 0
Branch on timer
2
2
TMF
Branch to specified address
in same page (P
7
to P
0
)
if TMF is zero. Clear TMF
to zero.
BNTM
addr
0 0 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
1 1 0 0
Branch on no timer
2
2
TMF
Branch to specified address
in same page (P
7
to P
0
)
if CF is one.
BC
addr
Branch on CF
0 1 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
1 1 1 1
2
2
Branch to specified address
in same page (P
7
to P
0
)
if CF is zero.
BNC
addr
Branch on no CF
0 0 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
1 1 1 1
2
2
Branch to specified address
in same page (P
7
to P
0
)
if ZF is one.
BZ
addr
Branch on ZF
0 1 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
1 1 1 0
2
2
Branch to specified address
in same page (P
7
to P
0
)
if ZF is zero.
BNZ
addr
Branch on no ZF
0 0 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
1 1 1 0
2
2
[I/O instructions]
IP
Input port to AC
0 0 0 0
1 1 0 0
1
1
AC
←
[P (DP
L
)]
Copy contents of port
specified by P (PD
L
) to AC.
Copy contents of AC to port
specified by P (DP
L
).
ZF
OP
Output AC to port
0 1 1 0
0 0 0 1
1
1
P (DP
L
)
←
(AC)
Set bit specified by immediate
data B
1
B
0
in port specified
by P (DP
L
) to one.
Execution of this
instruction
invalidates
contents of E.
SPB bit
Set port bit
0 0 0 0
0 1 B
1
B
0
1
2
P (DP
L
, B
1
B
0
)
←
1
Clear bit specified by
immediate data B
1
B
0
in port
specified by P (DP
L
) to zero.
Execution of this
instruction
invalidates
contents of E.
RPB bit
Reset port bit
0 0 1 0
0 1 B
1
B
0
1
2
P (DP
L
, B
1
B
0
)
←
0
ZF
[Other instructions]
WTTM
Write timer
1 1 1 1
1 0 0 1
1
1
TM
←
(E), (AC)
TMF
←
0
Copy contents of E and AC to
timer. Clear TMF to zero.
TMF
Execution
requires that pin
PA3 be high.
HALT
Halt
1 1 1 1
0 1 1 0
1
1
Halt
Suspend all operations.
NOP
No operation
0 0 0 0
0 0 0 0
1
1
No operation
Do nothing but consume one
machine cycle.
N
b
N
c