參數(shù)資料
型號(hào)： LC6529F
廠商： Sanyo Electric Co.,Ltd.
英文描述： 4-Bit Microcomputer for Small-Scale Control Applications
中文描述： 4小位微機(jī)控制應(yīng)用規(guī)模
文件頁數(shù)： 27/39頁
文件大?。?/td> 525K
代理商： LC6529F
Continued from preceding page.
Note:
*
The second and subsequent repetitions of an LI or CLA instruction produce the same effects as an NOP instruction.
No. 5117-27/39
LC6529N, LC6529F, LC6529L
Instruction code
Affected
status
bits
Mnemonic
Operation
Description
Note
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
[Accumulator manipulation instructions]
Compare contents of
immediate data field
(I
3
I
2
I
1
I
0
) with those of AC
and set CF and ZF according
to result.
Compare AC with
immediate data
0 0 1 0
0 1 0 0
1 1 0 0
I
3
I
2
I
1
I
0
CI data
2
2
I
3
I
2
I
1
I
0
+ (AC) + 1
ZF, CF
[Load and store instructions]
Load AC with
immediate data
Load AC with contents of
immediate data field
(I
3
I
2
I
1
I
0
).
Copy contents of AC to
M (DP).
LI data
1 1 0 0
I
3
I
2
I
1
I
0
1
1
AC
←
I
3
I
2
I
1
I
0
ZF
*
S
Store AC to M
0 0 0 0
0 0 1 0
1
1
M (DP)
←
(AC)
L
Load AC from M
0 0 1 0
0 0 0 1
1
1
AC
←
[M (DP)]
Copy contents of M (D) to AC. ZF
[Data pointer manipulation instructions]
Load DP
H
with zero
and DP
L
with
immediate data
respectively
Clear DP
H
to zero and copy
contents of immediate data
field (I
3
I
2
I
1
I
0
) to DP
L
.
LDZ
data
1 0 0 0
I
3
I
2
I
1
I
0
1
1
DP
H
←
0
DP
L
←
I
3
I
2
I
1
I
0
LHI data
Load DP
H
with
immediate data
0 1 0 0
0 0 I
1
I
0
1
1
DP
H
←
I
1
I
0
Copy contents of immediate
data field (I
1
I
0
) to DP
H
.
Add one to DP
L
.
Subtract one from DP
L
.
Copy contents of AC to DP
L
.
Copy contents of DP
L
to AC.
IND
Increment DP
L
Decrement DP
L
Transfer AC to DP
L
Transfer DP
L
to AC
1 1 1 0
1 1 1 0
1
1
DP
L
←
(DP
L
) + 1
DP
L
←
(DP
L
) – 1
DP
L
←
(AC)
AC
←
(DP
L
)
ZF
DED
1 1 1 0
1 1 1 1
1
1
ZF
TAL
1 1 1 1
0 1 1 1
1
1
TLA
1 1 1 0
1 0 0 1
1
1
ZF
[Jump and subroutine instructions]
JMP
addr
0 1 1 0
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
1 0 P
9
P
8
PC
←
P
9
P
8
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
STACK
←
(PC) + 1
PC
9
to PC
6
, PC
1
,
PC
0
←
0
PC
5
to PC
2
←
P
3
P
2
P
1
P
0
STACK
←
(PC) + 2
P
9
to P
0
←
0
P
9
P
8
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
Jump to address in immediate
data field (P
9
P
8
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
).
Jump
2
2
CZP
addr
Call subroutine in
the zero page
1 0 1 1
P
3
P
2
P
1
P
0
1
1
Call subroutine in zero page.
CAL
addr
Call subroutine
1 0 1 0
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
1 0 P
9
P
8
2
2
Call subroutine.
RT
Return from
subroutine
0 1 1 0
0 0 1 0
1
1
PC
←
(STACK)
Return from subroutine.
[Branch instructions]
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if ACt = 1
Branch to specified address
in same page (P
7
to P
0
) if bit
specified by immediate data
t
1
t
0
in AC is one.
The mnemonic
includes decimal
equivalent t of
immediate data
i.e., BA0 to BA3.
BAt
addr
0 1 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
0 1 t
1
t
0
Branch on AC bit
2
2
The mnemonic
includes decimal
equivalent t of
immediate data
i.e., BNA0 to
BNA3.
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if ACt = 0
Branch to specified address
in same page (P
7
to P
0
) if bit
specified by immediate data
t
1
t
0
in AC is zero.
BNAt
addr
Branch on no AC bit
0 0 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
0 0 t
1
t
0
2
2
PC
7
to PC
0
←
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
if [M (DP, t
1
t
0
)]
= 1
Branch to specified address
in same page (P
7
to P
0
) if bit
specified by immediate data
t
1
t
0
in M (DP) is one.
The mnemonic
includes decimal
equivalent t of
immediate data
i.e., BM0 to BM3.
BMt
addr
0 1 1 1
P
7
P
6
P
5
P
4
P
3
P
2
P
1
P
0
0 1 t
1
t
0
Branch on M bit
2
2
N
b
N
c
Magnitude
comparison
CF ZF
I
3
I
2
I
1
I
0
> AC
I
3
I
2
I
1
I
0
= AC
I
3
I
2
I
1
I
0
< AC
0
1
1
0
1
0
Continued on next page.
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