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Note:
*
*
f
CFOSC
is the allowable oscillator frequency.
Comparator Characteristics for Comparator Option
at Ta = –40 to +85°C, V
SS
= 0 V, V
DD
= 3.0 to 6.0 V
No. 5117-11/39
LC6529N, LC6529F, LC6529L
Parameter
Symbol
Conditions
min
typ
max
[Current drain]
RC oscillator
I
DD OP
1
I
DD OP
2
I
DD OP
3
I
DD OP
4
I
DD OP
5
I
DD OP
6
I
DD OP
7
I
DD OP
8
V
DD
: Figure 2, 850 kHz (typ)
V
DD
: Figure 2, 400 kHz (typ)
V
DD
: Figure 3, 4 MHz, 1/3 frequency divider
V
DD
: Figure 3, 4 MHz, 1/4 frequency divider
V
DD
: Figure 3, 2 MHz, 1/3 frequency divider
V
DD
: Figure 3, 2 MHz, 1/4 frequency divider
V
DD
: Figure 3, 800 kHz
V
DD
: Figure 3, 400 kHz
V
DD
: 200 to 667 kHz, 1/1 frequency divider,
600 to 2000 kHz, 1/3 frequency divider,
800 to 2667 kHz, 1/4 frequency divider
0.8
2.0
mA
0.4
1.0
1.6
4.0
1.6
4.0
Ceramic oscillator
1.3
3.0
mA
1.3
3.0
1.1
2.6
0.9
2.4
I
DD OP
9
1.0
2.5
External clock
mA
V
DD
: 200 to 1444 kHz, 1/1 frequency divider,
600 to 4330 kHz, 1/3 frequency divider,
800 to 4330 kHz, 1/4 frequency divider
I
DD OP
10
1.6
4.2
I
DD
st1
V
DD
: With output N-channel transistor off and
port level = V
DD
, V
DD
= 6 V
V
DD
: With output N-channel transistor off and
port level = V
DD
, V
DD
= 3 V
0.05
10
Standby operation
μA
I
DD
st2
0.025
5
[Oscillator characteristics] (RC oscillator)
OSC1, OSC2: Figure 2, Cext = 220 pF ± 5%,
Rext = 12.0 k
± 1%
OSC1, OSC2: Figure 2, Cext = 220 pF ± 5%,
Rext = 4.7 k
± 1%, V
DD
= 4 to 6 V
309
400
577
Oscillator frequency
f
MOSC
kHz
660
850
1229
[Oscillator characteristics] (Ceramic oscillator)
OSC1, OSC2: Figure 3, f
O
= 400 kHz
OSC1, OSC2: Figure 3, f
O
= 800 kHz
OSC1, OSC2: Figure 3, f
O
= 2 MHz
OSC1, OSC2: Figure 3, f
O
= 4 MHz
Figure 4, f
O
= 400 kHz
Figure 4, f
O
= 800 kHz, f
O
= 2 MHz, f
O
= 4 MHz,
1/3, 1/4 frequency divider
384
400
416
Oscillator frequency
f
CFOSC
*
768
800
832
kHz
1920
2000
2080
3840
4000
4160
10
Oscillator stabilization interval
t
CFS
10
ms
[Pull-up resistors]
Pull-up (PU) resistor configuration for port A or D:
With output N-channel transistor off and V
IN
= V
SS
,
V
DD
= 5 V
Pull-up (PU) resistor configuration for port C:
With output N-channel transistor off and V
IN
= V
SS
,
V
DD
= 5 V
RES: V
IN
= V
SS
, V
DD
= 5 V
RPP1
30
70
130
I/O ports
k
RPP2
1.0
2.3
3.9
Reset port
Ru
200
500
725
External reset characteristic:
Reset time
t
RST
See
Figure 6.
Pin capacitance
C
P
f = 1 MHz, V
IN
= V
SS
for pins other than one
being measured
10
pF
Parameter
Symbol
Conditions
min
typ
max
Unit
Reference input voltage range
V
RFIN
V
CMIN
V
OFF
TRS1
V
REF
0 and V
REF
1
CMP0 to CMP3
V
SS
+ 0.3
V
DD
– 1.5
V
DD
– 1.5
±300
V
Inphase input voltage range
V
SS
V
Offset voltage
V
CMIN
= V
SS
to V
DD
– 1.5 V
Figure 5: V
DD
= 4 to 6 V
Figure 5
±50
mV
Response speed
1.0
5.0
μs
TRS2
1.0
200
Input high level current
I
IH
1
I
IH
2
I
IL
1
I
IL
2
V
REF
0 and V
REF
1
CMP0 to CMP3: Without feedback resistor option
1.0
μA
1.0
Input low level current
V
REF
0 and V
REF
1
CMP0 to CMP3: Without feedback resistor option
–1.0
μA
–1.0
Feedback resistor
RCMFB
CMP0 to CMP3: With feedback resistor option
460
k