參數(shù)資料
型號: L64007
廠商: LSI CORP
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝: PLASTIC, QFP-160
文件頁數(shù): 157/166頁
文件大?。?/td> 1015K
代理商: L64007
register
8 Wed May 28 17:37:25 1997
Draft 1/21/97
4-8
Registers
PRE.4 for Rev. D
Copyright 1997 by LSI Logic Corporation. All rights reserved.
FILTER_EN_LSB
Filter Enable LSB
[15:0]
This is the LSB of the 32-bit lter enable register.
4.2.4
Address
Mapping
Register File
For a description of the AMRF in Group 0, see Section 4.10, “Address
4.3
Audio PID
Control
Registers
(Group 1)
This group of registers controls the processing of the audio PES stream
of the program to be decoded. The group includes registers to control
the PID processing and a group of registers to control the store of audio
PES data in the memory for extended channel mode operation.
The Audio PID Control Registers occupy memory space from 0xFFDE0
to 0xFFDEF.
The L64007 assumes that the payload data for this PID is an audio PES
stream. The data coming on this PID is transferred to the on-chip audio
transport buffer and to the A/V decoder output.
4.3.1
Audio PID Value
(APID)
The APID is a 13-bit register comprising the Audio PID eld. It is used
in the PID detection process for the audio stream of the program being
decoded. When a transport packet comes into the L64007 and contains
a PID value matching the specied APID, the transport payload is pro-
cessed as an audio PES stream of the program being decoded. The ACT
bit in the Audio PID Control Register must be set to 1 for this register to
become active.
The APID Register structure and its bit eld are described below.
15
0
Filter Enable Register (LSB)
15
13
12
0
RES
APID
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